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US 6,603,166 B2Granted
Frontside contact on silicon-on-insulator substrate
AssigneeHoneywell International Inc.
InventorsPaul S. Fechner, Cheisan Yue
Life of this patent
Estimating the term…
Abstract
A method of forming a frontside contact to a Silicon-On-Insulator (SOI) wafer is described. A connection polysilicon connects a silicon substrate layer to a contact plug. This connection provides a means to ground or bias the bottom substrate of the SOI wafer. Spacers may be added to provide additional doping.
Claims27
A frontside contact on a silicon-on-insulator substrate, comprising in combination:
- a contact plug;
- a plurality of semiconductor layers including at least a field oxide layer and a buried oxide layer, wherein a hole is etched through the field oxide layer and the buried oxide layer exposing a substrate layer;
- and
- a connection polysilicon providing a connection between the substrate layer and the contact plug, wherein the connection provides a means to bias the substrate layer.
1 more element
A frontside contact on a silicon-on-insulator substrate, comprising in combination:
- a contact plug;
- a plurality of semiconductor layers including at least a field oxide layer and a buried oxide layer, wherein a hole is etched through the field oxide layer and the buried oxide layer exposing a substrate layer;
- at least one spacer disposed in the hole to provide additional doping;
- and
- a connection polysilicon providing a connection between the substrate layer and the contact plug, wherein the connection provides a means to bias the substrate layer.
2 more elements
A frontside contact on a silicon-on-insulator substrate, comprising in combination:
- a tungsten contact plug, wherein a metal pad is located substantially above the tungsten contact plug;
- a plurality of semiconductor layers including at least a field oxide layer and a buried oxide layer, wherein a hole is etched through the field oxide layer and the buried oxide layer exposing a substrate layer, wherein the substrate layer has a P+ implant region below the hole that is substantially doped with an implant of 1.25×1015 atoms/cm2 at 70 keV, and wherein a contact dielectric layer is substantially located above the field oxide layer;
- and
- a connection polysilicon providing a connection between the doped region of the substrate layer and the tungsten contact plug, wherein a silicide is substantially located between the connection polysilicon and the tungsten contact plug, and wherein the connection provides a means to bias the substrate layer.
1 more element
Dependencies are inferred from the claim text.