Method of integrating scatterometry metrology structures directly into die design

Abstract

The present invention is directed to a method of incorporating metrology grating structures into die design. In one embodiment, the invention is directed to a wafer comprised of a semiconducting substrate, a plurality of production die formed on the substrate, and at least one non-production die formed on the substrate, the non-production die having at least one grating structure formed therein that will ultimately be measured in subsequent metrology tests. The present invention is also directed to a method that comprises providing a semiconducting substrate, forming at least one production integrated circuit device in a plurality of production die formed on the substrate, and forming at least one grating structure in the non-production die. The method further comprises illuminating at least one of the grating structures formed in the non-production die and measuring light reflected off of the illuminated grating structure to generate an optical characteristic trace for the illuminated grating structure formed in the non-production die.

Dependencies are inferred from the claim text.