Self-aligned silicon germanium heterojunction bipolar transistor device with electrostatic discharge crevice cover for salicide displacement
AssigneeInternational Business Machines Corporation
InventorSteven H. Voldman
Life of this patent
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Abstract
A method and structure for a bipolar transistor with a semiconductor substrate having a surface and a shallow trench isolation (STI) in the surface. The STI has an edge, a crevice region in the STI adjacent the STI edge, a base region above the STI, a silicide above the base region, an emitter structure on the surface adjacent the base region, and a crevice cover between the emitter structure and the silicide. The crevice cover maintains spacing between the emitter structure and the silicide.
Claims20
A bipolar transistor comprising:
- a semiconductor substrate having a surface;
- a shallow trench isolation (STI) in said surface, said STI having an edge;
- a crevice region in said STI adjacent said STI edge;
- a base region above said STI;
- a silicide above said base region;
- an emitter structure on said surface adjacent said base region;
- and
- a crevice cover between said emitter structure and said silicide,
- wherein said crevice cover maintains spacing between said emitter structure and said silicide.
A bipolar transistor comprising:
- a semiconductor substrate having a surface;
- an insulator in said surface,
- a base region above said insulator, said base region having an upper silicide;
- an emitter structure on said surface adjacent said base region;
- and
- a crevice cover between said emitter structure and said silicide,
- wherein said crevice cover maintains spacing between said emitter structure and said silicide.
A method of forming a bipolar transistor comprising:
- forming a shallow trench isolation (STI) in a substrate, said STI having an edge, such that a crevice region is formed in said STI adjacent said STI edge;
- simultaneously growing a base region above said STI and a semiconductor of an emitter structure on said substrate adjacent said STI;
- forming conductors of said emitter structure above said semiconductor;
- forming a crevice cover on said base region adjacent said emitter structure;
- and
- saliciding an upper layer of said base region and adjacent said crevice cover to produce a silicide,
- wherein said crevice cover maintains spacing between said emitter structure and said silicide.
Dependencies are inferred from the claim text.