Silicon barrier layer to prevent resist poisoning
AssigneeAdvanced Micro Devices, Inc.
InventorsMarina V. Plat, Robert Ogle, Lewis Shen
Life of this patent
Estimating the term…
Loading patent…
AssigneeAdvanced Micro Devices, Inc.
InventorsMarina V. Plat, Robert Ogle, Lewis Shen
Estimating the term…
A thin barrier layer of undoped silicon is formed on an ARC to prevent resist poisoning and footing. The silicon layer can be removed with improved yield and high selectivity with respect to the underlying gate dielectric layer, thereby avoiding degradation of the gate dielectric layer. Embodiments include forming a silicon oxynitride ARC on a polycrystalline silicon layer overlying a silicon oxide layer, depositing a thin undoped polycrystalline or amorphous silicon barrier layer on the ARC, forming a photoresist mask on the barrier layer, etching to form a gate electrode on a gate oxide layer and removing the photoresist mask. The undoped polycrystalline or amorphous silicon barrier layer is then removed employing conventional wet or dry etching techniques with high etch selectivity to the underlying gate oxide layer, thereby avoiding degradation of the gate oxide layer.
A method of manufacturing a semiconductor device, the method comprising:
Dependencies are inferred from the claim text.