Method of using trenching techniques to make a transistor with a floating gate

A method of forming a semiconductor memory cell device, said method comprising:

• depositing an insulating layer on a substrate;
• depositing a first layer of conductive material on the insulating layer, such that all of a bottom the first layer of conductive material is on the insulating layer;
• etching a trench in said first layer;
• forming a thermal oxide layer in said trench;
• depositing a second oxide layer over the thermal oxide layer;
• etching the first layer to form a floating gate having a tip and an outer sidewall, wherein the second oxide layer in said trench is used as a mask during this etching step, and, wherein the etching of the first layer is controlled such that the outer sidewall of the floating gate is not perpendicular to the substrate;
• forming a layer of tunneling oxide over said the floating gate;
• depositing a second layer of conductive material over the tunneling oxide;
• etching the second layer of conductive material to form a control gate;
• implanting ions in the substrate to form a drain region;
• and
• implanting ions in the substrate to from a source region.