US 6,583,870 B2 · Simulated defective wafer and pattern defect inspection recipe preparing method

Abstract

A provisional inspection recipe is prepared using a simulated defective wafer having a simulated defect layer which has the variations in height and plane shape with respect to a simulated normal layer. An actual defect inspection for the simulated defective wafer is carried out by means of a defect inspection system to compare a detected defect data with a previously obtained simulated defect data of the simulated defective wafer to quantify a defect detection sensitivity. The provisional inspection recipe is modified while changing tentative recipe parameters until a desired defect detection ratio is obtained. When the desired defect detection ratio is obtained, the tentative recipe parameters at the time are decided as recipe parameters adaptive for the defect inspection system.

Claims20

Dependent claims

A simulated defective wafer comprising:

a simulated normal layer formed on a semiconductor substrate and configured such that a top face of said simulated normal layer is at a first height from a surface of the semiconductor substrate;
and
a first simulated defect layer formed on said semiconductor substrate and configured such that a top face of said first simulated defect layer is at a second height, different from said first height, from the surface of the semiconductor substrate.

A method for preparing a defect inspection recipe for use in a semiconductor defect inspection system, comprising:

setting a tentative recipe parameter;
preparing a first provisional pattern defect inspection recipe on a basis of said recipe parameter;
detecting a defect of a simulated defective wafer by using said first provisional pattern defect inspection recipe;
and
obtaining simulated defect data comprising data on a defect kind from said simulated defective wafer;
calculating a defect detection ratio of said first provisional pattern defect inspection recipe by comparing detected defect data from said detecting step with said simulated defect data;
determining a pattern defect detection sensitivity of said first provisional pattern defect inspection recipe by comparing a calculated pattern defect detection ratio with a desired pattern defect detection ratio;
repeating said preparing step through said determining step until a desired defect detection sensitivity is obtained while changing said tentative recipe parameter when the calculated defect detection ratio is lower than said desired defect detection ratio;
and
deciding an adaptive recipe parameter for said semiconductor defect inspection system at a time when said desired defect detection sensitivity is obtained.

7 more elements

Dependencies are inferred from the claim text.

Simulated defective wafer and pattern defect inspection recipe preparing method

Life of this patent

Simulated defective wafer and pattern defect inspection recipe preparing method

Life of this patent

Abstract

Claims20