Apparatus for package reduction in stacked chip and board assemblies

An interposer assembly configured for electrical connection to

• a carrier substrate, the assembly comprising:
• a first interposer substrate having a first surface, a second opposing surface and at least one opening therethrough;
• a second interposer substrate having a first surface, a second opposing surface and at least one opening therethrough, said first surface of said first interposer substrate substantially facing said first surface of said second interposer substrate, said first and second interposer substrates being electrically connected by a plurality of conductive elements extending transversely therebetween;
• and
• at least one first die and at least one second die, each having an active surface, said active surface of said at least one first die attached to said second surface of said first interposer substrate over said at least one opening thereof and electrically connected to said first surface thereof through said at least one opening thereof, said active surface of said at least one second die attached to said second surface of said second substrate over said at least one opening thereof and electrically connected to said first surface thereof through said at least one opening thereof;
• wherein a second surface of one of said first and said second interposer substrates carries another plurality of conductive elements projecting transversely therefrom and arranged for effecting an electrical connection between said second surface of said one of said first and said second interposer substrates to a carrier substrate.

A semiconductor device assembly, comprising:

• a first interposer substrate having at least one semiconductor die secured thereto on one side thereof and a plurality of terminals in electrical communication with the at least one semiconductor die on an opposite side thereof;
• a second interposer substrate having at least one semiconductor die secured thereto on one side thereof and a plurality of terminals in electrical communication with the at least one semiconductor die on an opposite side thereof;
• the first and second interposer substrates being disposed in mutually parallel relationship and electrically connected through a first plurality of conductive elements extending transversely between the terminals of the first interposer substrate and the terminals of the second interposer substrate, wherein the first and second interposer substrates are oriented with no semiconductor dice located therebetween;
• and
• a second plurality of conductive elements extending transversely from a side of one of the first and second interposer substrates for connecting the assembly to a carrier substrate.