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US 6,583,070 B1Granted
Semiconductor device having a low dielectric constant material
AssigneeAdvanced Micro Devices, Inc.
InventorsTing Y. Tsui, Ercan Adem
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Abstract
A semiconductor device having a reduced resistance-capacitance time constant is formed by treating a dielectric layer to reduce its dielectric constant. Embodiments include exposing a deposited dielectric layer to ionic radiation, as with Helium ion implantation, to form voids within the layer, thereby reducing its dielectric constant.
Claims8
A method of forming a layer of low dielectric constant material on a substrate, the method comprising:
- forming a first conductive layer on a substrate;
- depositing a dielectric layer comprising a silicon oxide having a porosity of about 15 to about 48% on the first conductive layer;
- placing the silicon oxide dielectric layer into an ion implantation chamber maintained at about room temperature and implanting ions into the dielectric layer,
- forming a second conductive layer on the dielectric layer, wherein the dielectric layer contains voids having a diameter of about 100 Å to about 1,000 Å substantially throughout the dielectric layer, thereby lowering the dielectric constant of the dielectric layer.
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Dependencies are inferred from the claim text.