Manufacturing method of semiconductor device and designing method of semiconductor device

A method of manufacturing a semiconductor device comprising a memory cell region and an adjacent region which has an adjacent element formation region partitioned by an element isolation region;

• which comprises the steps of:
• forming a plurality of dummy patterns partitioned by a plurality of first trenches and a plurality of memory cell formation regions partitioned by a plurality of second trenches with a smaller width than a plurality of said first trenches, in said element isolation region and in said memory cell region, respectively;
• forming a film for polishing on said adjacent region and said memory cell region so as to provide raised sections above a plurality of said dummy patterns as well as said adjacent element formation region, and provide sunken sections above a plurality of said first trenches;
• and
• removing said film for polishing that overlies said adjacent region and said memory cell region by means of polishing so that said film for polishing may remain inside of a plurality of said first trenches as well as inside of a plurality of said second trenches;
• wherein:
• a top surface area for a plurality of said dummy patterns and a width for a plurality of said first trenches are set on the basis of a ratio of a total top surface area for raised sections of said film for polishing above a plurality of dummy patterns as well as raised sections thereof above said adjacent element formation region to a horizontally projected area of said adjacent region.

A method of designing a semiconductor device;

• which is manufactured by a method comprising the steps of:
• forming a plurality of first trenches in a first region on a semiconductor substrate and thereby forming a plurality of dummy patterns that are partitioned by a plurality of said first trenches;
• forming a film for polishing at least on said first region so as to provide raised sections above a plurality of said dummy patterns and sunken sections above a plurality of said first trenches;
• and
• removing said film for polishing that overlies a plurality of said dummy patterns by means of polishing so that said film for polishing may remain inside of a plurality of said first trenches;
• wherein:
• a top surface area for a plurality of said dummy patterns and a width for a plurality of said first trenches are set on the basis of a ratio of a total top surface area for raised sections of said film for polishing to a horizontally projected area of said first region.