Semiconductor memory device and method for manufacturing the same

A method for manufacturing a semiconductor memory device, comprising the steps of:

• forming a semiconductor substrate having a memory cell region and at least one core circuit/peripheral circuit region;
• forming a first transistor in the at least one core circuit/peripheral circuit region, wherein said first transistor includes a first gate stack having straight side walls and disposed between a first pair of spacers;
• forming an etch stop layer covering the semiconductor substrate, wherein said etch stop layer also covers the first gate stack;
• forming a planarized interlayer dielectric film covering the etch stop layer;
• and
• forming a second transistor in the memory cell region by a damascene method, wherein said second transistor has a second gate stack having concave-shaped side walls and disposed between a second pair of spacers, and said step of forming the second transistor further comprises the steps of:
• forming at least a pair of reverse gate patterns by patterning the interlayer dielectric film covering the memory cell region, so as to form a first trench positioned between the pair of reverse gate patterns;
• forming said second pair of spacers on inner sidewalls of said pair of reverse gate patterns, said second pair of spacers overlying a portion of the etch stop layer;
• implanting impurities into the semiconductor substrate through said first trench, so as to control a threshold voltage of the second transistor
• forming said second gate stack between said second pair of spacers in said first trench;
• and
• removing the pair of reverse gate patterns, so as to form a pair of second trenches with the second gate stack therebetween.