Semiconductor device manufacturing method capable of reliable inspection for hole opening and semiconductor devices manufactured by the method
AssigneeFujitsu Limited
InventorKenichi Watanabe
Life of this patent
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AssigneeFujitsu Limited
InventorKenichi Watanabe
Estimating the term…
A substrate defining an insulating surface layer portion and formed with a wiring groove filled with a wiring line the wiring line is electrically connected to a conductive member. The conductive member occupies an area larger than an area of the wiring line as viewed along a line parallel to a normal to the first surface. An insulating first film is formed on the first surface. A via hole is formed through the first film. The via hole is formed so that a boundary between the wiring line and the insulating surface layer portion passes through the inside of the via hole. The bottom of the via hole is observed with an apparatus for obtaining image information by utilizing secondary electrons and reflection electrons, to judge whether a state of the bottom of the via hole is accepted or rejected.
A semiconductor device comprising:
Dependencies are inferred from the claim text.