US 6,555,909 B1 · Seedless barrier layers in integrated circuits and a method of manufacture therefor

Abstract

An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer is formed on the semiconductor substrate and a channel dielectric layer on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening and a conductor core fills the opening over the barrier layer. A seedless barrier layer lines the opening, and a conductor core fills the opening over the seedless barrier layer. The barrier layer is deposited in the opening and contains atomic layers of barrier material which bonds to the dielectric layer, an intermediate material which bonds to the barrier material layer and to the conductor core, and a conductor core material which bonds to the intermediate material. The conductor core bonds to the conductor core material.

Claims15

Dependent claims

An integrated circuit comprising:

a semiconductor substrate having a semiconductor device provided thereon;
a first dielectric layer formed over the semiconductor substrate and having an opening provided therein;
a barrier layer lining the opening and of mixed atomic layers of a barrier material, an intermediate material, and a conductor core material, the intermediate material of a different material from the barrier material and the conductor core material;
and
a conductor core of the conductor core material filling the opening and connected to the semiconductor device.

2 more elements

An integrated circuit comprising:

a semiconductor substrate having a semiconductor device provided thereon;
a device dielectric layer formed on the semiconductor substrate;
a first channel dielectric layer formed on the device dielectric layer and having a first channel opening provided therein;
a barrier layer lining the first channel opening and of mixed atomic layers of a barrier material, an intermediate material, and a conductor core material, the intermediate material of a different material from the barrier material and the conductor core material;
a first conductor core filling the first channel opening and connected to the semiconductor device;
a via dielectric layer formed over the first channel dielectric layer, the barrier layer, and the first conductor core and having a via opening provided therein open to the first conductor core;
a second channel dielectric layer formed over the first channel dielectric layer and having a second channel opening provided therein open to the via opening;
a second barrier layer lining the second channel opening and via opening and of mixed atomic layers of a barrier material, an element, and a conductor core material, the intermediate material of a different material from the barrier material and the conductor core material;
and
a second conductor core filling the second channel and via openings and connected to the first conductor core.

7 more elements

Dependencies are inferred from the claim text.

Seedless barrier layers in integrated circuits and a method of manufacture therefor

Life of this patent

Seedless barrier layers in integrated circuits and a method of manufacture therefor

Life of this patent

Abstract

Claims15