Self-aligned buried strap for vertical transistors

A semiconductor device comprising:

• a substrate including a trench therein, the trench having a buried bitline formed therein;
• a layer of dopant rich material formed on the buried bitline;
• a trench top dielectric formed on the layer of dopant rich material, wherein a portion of the layer of dopant rich material is disposed between the substrate and a side portion of the trench top dielectric that is adjacent to the substrate;
• and
• a strap diffusion formed by outdiffusion of dopants from the dopant rich material into an adjacent region of the substrate, the adjacent region of the substrate being operatively disposed relative to a gate conductor formed in an upper portion of the trench.

A semiconductor device comprising:

• a substrate including a trench therein, the trench having a storage node formed therein including a buried strap on top of the storage node;
• a dopant rich material formed on the buried strap;
• a trench top dielectric formed on the dopant rich material;
• a strap diffusion formed by outdiffusion of dopants from the dopant rich material into an adjacent region of the substrate, the adjacent region of the substrate being operatively disposed relative to a gate conductor formed in an upper portion of the trench;
• and
• a nitride liner disposed between the layer of dopant rich material and the trench top dielectric for blocking dopants from entering the trench top dielectric.