Integrated circuit layout and verification method
AssigneeTexas Instruments Incorporated
InventorsShane R. Palmer, John N. Randall, Thomas J. Aton
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Abstract
A method of performing and verifying an integrated circuit layout is provided that comprises the steps of performing the layout of a mask. Proximity correction techniques are then applied to the mask layout data. Theoretical contours which comprise curvilinear forms are then extrapolated from the corrected mask data set. The curvilinear contour data is then bounded using boxing algorithms in order to generate a bounded contour data set. The bounded contour data set can then be compared to the original input mask data to detect design rule violations and other characteristics of the original layout.
Claims14
A method for constructing an integrated circuit comprising:
- generating a mask layout data set associated with a desired set of features for a layer of an integrated circuit device;
- generating from the mask layout data set a proximity corrected data set associated with proximity corrected features within the layer of the integrated circuit device;
- generating a bounded contour data set from the proximity corrected data set, the bounded contour data set representing the theoretically predicted structures which would be formed using a mask constructed from the proximity corrected data set;
- and
- comparing the bounded contour data set with the mask layout data set and generating an error data set representative of the difference between the bounded contour data set and the mask layout data set.
A method for constructing an integrated circuit comprising:
- generating a mask layout data set associated with a desired set of features for a layer of an integrated circuit device;
- generating from the mask layout data set a proximity corrected data set associated with proximity corrected features within the layer of the integrated circuit device;
- generating a curvilinear contour data set using the proximity corrected mask data set, the curvilinear contour data set representing curvilinear forms that would be formed using a mask constructed from the proximity corrected data set;
- generating a bounded contour data set from the curvilinear contour data set;
- comparing the bounded contour data set with the mask layout data set and generating an error data set representative of the difference between the bounded contour data set and the mask layout data set;
- and
- testing the bounded contour data set against design rule parameters associated with the character and spacing of features within an integrated circuit layer and generating a design rule violation data set identifying portions of the bounded contour data set associated with features that violate the design rule parameters.
Dependencies are inferred from the claim text.