Back to results
US 6,552,596 B2Granted
Current saving mode for input buffers
AssigneeMicron Technology, Inc.
InventorsTimothy B. Cowles, Victor Wong
Life of this patent
Estimating the term…
Abstract
An input buffer receives an external input signal during an active mode and a low-power mode. The input buffer includes a switching system to switch the input buffer between multiple conductive paths such that current consumed by the input buffer during the low-power mode is substantially less than current consumed by the buffer during the active mode.
Claims74
A buffer comprising:
- an input stage including an input node to receive an input signal to produce an output signal, another input node to receive a reference signal, the input stage being connected to a supply voltage;
- a variable resistance system connected between the input stage and the supply voltage, and responsive to a mode signal for reducing an amount of current flowing through the input stage during a low-power mode;
- and
- output stage connected to the input stage to receive and drive the output signal.
1 more element
A buffer comprising:
- an input stage including an input node to receive an input signal to produce an output signal, the input stage being connected to a supply voltage;
- and
- a variable resistance system connected between the input stage and the supply voltage, and responsive to a mode signal for reducing an amount of current flowing through the input stage during a low-power mode, wherein the input stage further includes another input node to receive a reference signal.
A buffer comprising:
- an input stage including an input node to receive an input signal to produce an output signal, the input stage being connected to a supply voltage;
- a variable resistance system connected between the input stage and the supply voltage, and responsive to a mode signal for reducing an amount of current flowing through the input stage during a low-power mode;
- and
- an output stage connected to the input stage to receive and drive the output signal.
1 more element
A buffer comprising:
- an input stage including an input node to receive an input signal and an output node to produce an output signal;
- an output stage connected to the input stage to receive and drive the output signal;
- and
- a switching system to connect the input stage to a supply voltage and ground via a first conductive path during a first operating mode and to connect the input stage to the supply voltage and ground via a second conductive path during a second operating mode.
1 more element
A buffer comprising:
- an input stage including an input to receive an input signal and an output to produce an output signal;
- an output stage connected to the input stage to receive and drive the output signal;
- a first conductive path to connect the input stage to a supply voltage and ground during a first operating mode;
- and
- a second conductive path to connect the input stage to a supply voltage and ground during a second operating mode.
2 more elements
A buffer comprising:
- an input stage to receive an input signal and a reference signal to produce an output signal;
- an output stage connected to the input stage to receive and drive the output signal;
- a first variable resistance circuit connected between the input stage and a first supply potential to vary a resistance of a conductive path connected between the input stage and the first supply potential;
- and
- a second variable resistance circuit connected between the input stage and a second supply potential to vary a resistance of a conductive path connected between the input stage and the second supply potential.
2 more elements
A buffer comprising:
- an input stage to receive an input signal and a reference signal to produce an output signal;
- an output stage connected to the input stage to receive and drive the output signal;
- a first current controller connected between the input stage and a first supply potential to vary an amount of current flowing between the input stage and the first supply potential;
- and
- a second current controller connected between the input stage and a second supply potential :to vary an amount of current flowing between the input stage and the second supply potential.
2 more elements
A buffer comprising:
- a first CMOS transistor pair to receive a reference signal to produce a reference output signal;
- a second CMOS transistor pair connected to the first CMOS transistor pair at a first node and a second node, the second CMOS transistor pair being connected to an input node to receive an input signal to produce an output signal at an output node;
- a first pass transistor connected between the first node and a pullup node;
- a second pass transistor connected between the second node and a pulldown node;
- a first pullup transistor connected between the pullup node and a supply voltage;
- a second pullup transistor connected between the pullup node and the supply voltage;
- a first pulldown transistor connected between the pulldown node and ground;
- and
- a second pulldown transistor connected the between the pulldown node and the supply voltage.
6 more elements
An integrated circuit comprising:
- a control circuit to receive an input signal to generate a first enable signal during a first operating mode and a second enable signal during a second operating mode;
- a reference generator to generate a reference signal;
- and
- a buffer connected to the control circuit and the reference generator, the buffer including:
- an input stage to receive the input signal and a reference signal to produce an output signal;
- an output stage connected to the input stage to receive and drive the output signal;
- and
- a switching system to connect the input stage to a supply voltage and ground via a first conductive path in response to the first enable signal, and to connect the input stage to the supply voltage and ground via a second conductive path in response to the second enable.
5 more elements
A memory device comprising:
- a control circuit to receive an input signal to generate a first enable signal during an active mode of the memory device and to generate a second enable signal during a low-power mode of the memory device;
- a plurality of memory cells to be accessed in a read or a write operation during the memory active mode;
- a reference generator to generate a reference signal;
- and
- a buffer connected to the control circuit and the reference generator, the buffer including:
- an input stage to receive the input signal and a reference signal to produce an output signal;
- an output stage connected to the input stage to receive and drive the output signal such that the control circuit activates the read or write mode to access the memory cells based on the state of output signal;
- and
- a switching system to connect the input stage to a supply voltage and ground via a first conductive path in response to the first enable signal, and to connect the input stage to the supply voltage and ground via a second conductive path in response to the second enable signal.
6 more elements
A system comprising:
- a processor;
- and
- a memory device connected to the processor, the memory device comprising:
- a control circuit to receive an input signal to generate a first enable signal during an active mode of the memory device and to generate a second enable signal during a low-power mode of the memory device;
- a plurality of memory cells to be accessed in a read or a write operation during the memory active mode;
- a reference generator to generate a reference signal;
- and
- a buffer connected to the control circuit and the reference, the buffer including:
- an input stage to receive the input signal and a reference signal to produce an output signal;
- an output stage connected to the input stage to receive and drive the output signal such that the control circuit activates the read or write mode to access the memory cells based on the state of output signal;
- and
- a switching system to connect the input stage to a supply voltage and ground via a first conductive path in response to the first enable signal, and to connect the input stage to the supply voltage and ground via a second conductive path in response to the second enable signal.
9 more elements
A method of forming a buffer, the method comprising:
- forming a first stage of the buffer to receive a reference signal and an input signal to provide an output signal;
- forming an output stage to receive the output signal and drive the output signal;
- forming a first conductive path connecting the input stage to a supply voltage and ground;
- and
- forming a second conductive path connecting the input stage to a supply voltage and ground.
2 more elements
A method of operating a buffer, the method comprising:
- receiving a reference signal at an input of a differential amplifier;
- receiving an input signal at another input of the differential amplifier;
- switching a current path of the differential amplifier to a first conductive path based on a relationship of between the reference and input signals in one operating mode of the buffer;
- and
- switching the current path of the differential amplifier to a second conductive path based on the relationship between the reference and input signals in another operating mode of the buffer.
2 more elements
A method of reducing current in a buffer, the method comprising:
- receiving an input signal at an input stage;
- varying a resistance of a conductive path that connects the input stage to a supply voltage and ground between an active mode and a low-power mode;
- and
- receiving a reference signal at the input stage.
1 more element
A method of reducing current in a buffer, the method comprising:
- receiving an input signal at an input stage;
- varying a resistance of a conductive path that connects the input stage to a supply voltage and ground between an active mode and a low-power mode;
- receiving a reference signal at the input stage;
- and
- varying a resistance includes increasing the resistance of the conductive path that connects the differential amplifier to a supply voltage and ground during the low-power mode.
2 more elements
Dependencies are inferred from the claim text.