US 6,552,583 B1Granted

ESD-protection device with active R-C coupling to gate of large output transistor

AssigneePericom Semiconductor Corp.

InventorDavid Kwong

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Abstract

Large output driver transistors are used to shunt electro-static-discharge (ESD) pulses. ESD pulses are capacitivly coupled to the gates of the large driver transistors by R-C networks. The capacitive coupling causes a gate-to-source voltage to exceed the transistor threshold, turning on the large driver transistor to shunt the ESD current. Transistor switches are inserted into the R-C networks. These transistor switches disconnect the R-C networks during normal operation, and ensure that the R-C networks couple the I/O pad to the gates of the output driver transistors only when power is turned off. Since ESD events normally occur when power is disconnected, such as during handling by a person or machine, the ESD protection is only needed when power is off. Thus an active ESD-protection device can be disabled during normal powered operation of the IC. A feedback circuit detects power and biases the gates of the transistor switches.

Claims20

Dependent claims

An integrated circuit (IC) with an output buffer with integrated electro-static-discharge (ESD) protection comprising:

a pad for driving a signal from the IC to an external device;
a p-channel driver transistor, having a p-gate node driven by core circuitry inside the IC to indicate when to drive the signal high, the p-channel driver transistor coupled to drive a pull-up current to the pad in response to the p-gate node;
a first coupling capacitor for capacitivly coupling to the p-gate node an ESD pulse applied to the pad;
a first resistor for discharging the ESD pulse coupled to the p-gate node by the first coupling capacitor;
a first switch transistor, coupled to block current through the first resistor, for disconnecting current through the first resistor from the p-gate node when power is applied to the IC, but for enabling current flow through the first resistor from the p-gate node when the power is not applied to the IC;
an n-channel driver transistor, having an n-gate node driven by the core circuitry inside the IC to indicate when to drive the signal low, the n-channel driver transistor coupled to drive a pull-down current to the pad in response to the n-gate node;
a second coupling capacitor for capacitivly coupling to the n-gate node the ESD pulse applied to the pad;
a second resistor for discharging the ESD pulse coupled to the n-gate node by the second coupling capacitor;
and
a second switch transistor, coupled to block current through the second resistor, for disconnecting current through the second resistor from the n-gate node when the power is applied to the IC, but for enabling current flow through the second resistor from the n-gate node when the power is not applied to the IC, whereby the ESD pulse is coupled to the gate rodes of the driver transistors when the power is not applied to the IC.

7 more elements

An electro-static-discharge (ESD) protection circuit comprising:

a pad for connecting to an external system;
a p-channel driver transistor having a first gate coupled to a first gate node, a source connected to a power-supply bus, and a drain coupled to the pad;
a first capacitor coupled between the pad and a first coupling node;
a first de-coupling transistor coupled between the first coupling node and the first gate node;
a first resistor coupled between the power-supply bus and a first discharge node;
a first discharge transistor coupled between the first discharge node and the first gate node;
an n-channel driver transistor having a second gate coupled to a second gate node, a source connected to a ground bus, and a drain coupled to the pad;
a second capacitor coupled between the pad and a second coupling node;
a second de-coupling transistor coupled between the second coupling node and the second gate node;
a second resistor coupled between the ground bus and a second discharge node;
and
a second discharge transistor coupled between the second discharge node and the second gate node.

9 more elements

An electro-static-discharge (ESD) protected output buffer comprising:

an output node;
pullup driver transistor means for sourcing a rising driving current from a first bus to the output node in response to a first gate node;
coupling capacitor means for coupling an ESD pulse applied to the output node to a coupled node;
first de-coupling transistor means for connecting the coupled node to the first gate node when power is not applied, but for disconnecting the coupled node from the first gate node when the power is applied;
first discharge means for discharging the first gate node to the first bus when the power is not applied, but for not discharging the first gate node when the power is applied;
pull-down driver transistor means for sinking a falling driving current from the output node to a second bus in response to a second gate node;
second de-coupling transistor means for connecting the coupled node to the second gate node when the power is not applied, but for disconnecting the coupled node from the second gate node when the power is applied;
and
second discharge means for discharging the second gate node to the second bus when the power is not applied, but for not discharging the second gate node when the power is applied,
whereby the ESD pulse applied to the output node is coupled to the first or second gate node to enable the pullup or pull-down driver transistor means to shunt the ESD pulse when the power is not applied.

7 more elements

Dependencies are inferred from the claim text.