Use of gate electrode workfunction to improve DRAM refresh
AssigneeMicron Technology, Inc.
InventorCharles H. Dennison
Life of this patent
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Abstract
This invention relates to a method and resulting structure, wherein a DRAM may be fabricated by using silicon midgap materials for transistor gate electrodes, thereby improving refresh characteristics of access transistors. The threshold voltage may be set with reduced substrate doping requirements. Current leakage is improved by this process as well.
Claims99
A DRAM device comprising:
- at least one NMOS access transistor having a gate electrode comprising a midgap material containing at least two material components, the threshold voltage of said access transistor being set at least in part by the mole fraction of said midgap material components of said gate electrode of said access transistor;
- and
- at least one first periphery logic transistor having a gate electrode comprising a midgap material containing at least two material components, the threshold voltage of said at least one first periphery logic transistor being set at least in part by the mole fraction of said midgap material components of said gate electrode of said periphery logic transistor.
A memory device, comprising:
- a NMOS memory array access transistor having a gate electrode comprising a midgap material containing at least two material components, the threshold voltage of said gate electrode of said memory array access transistor being set at least in part by the mole fraction of said midgap material components of said gate electrode of said memory array access transistor and a concentration of channel dopant reduced in accordance with said mole fraction of said midgap material components of said gate electrode of said memory array access transistor;
- a first periphery logic transistor having a gate electrode comprising a midgap material containing at least two material components, the threshold voltage of said gate electrode of said first periphery logic transistor being set at least in part by the mole fraction of said midgap material components of said gate electrode of said first periphery logic transistor and a concentration of channel dopant reduced in accordance with said mole fraction of said midgap material components of said gate electrode of said first periphery logic transistor;
- and
- a second periphery logic transistor having a gate electrode comprising a midgap material containing at least two material components, the threshold voltage of said gate electrode of said second periphery logic transistor being set at least in part by the mole fraction of said midgap material components of said gate electrode of said second periphery logic transistor and a concentration of channel dopant reduced in accordance with said mole fraction of said midgap material components of said gate electrode of said second periphery logic transistor.
A DRAM device, comprising:
- an access transistor having a gate electrode comprising a midgap material containing at least two material components, said gate electrode of said access transistor having a tailored workfunction, said workfunction being tailored in accordance with the mole fraction of said midgap material components of said gate electrode.
A DRAM access transistor having improved refresh, comprising:
- a gate electrode having a tailored workfunction;
- said workfunction of said gate electrode being tailored in accordance with the mole fraction of a midgap material comprising said gate electrode, said midgap material containing at least two material components;
- the threshold voltage of said access transistor being set at least in part by said mole fraction of said midgap material components.
A DRAM access transistor having a gate electrode comprising P+ polysilicon.
A processor system, comprising:
- a processor;
- and
- a memory circuit coupled to said processor, at least one of said memory circuit and said processor comprising:
- an access transistor having a gate electrode comprising a midgap material containing at least two material components, the threshold voltage of said gate electrode of said access transistor being set at least in part by the mole fraction of said midgap material components of said gate electrode of said access transistor and an accordingly reduced amount of channel dopant;
- a periphery NMOS transistor having a gate electrode comprising a midgap material containing at least two material components, the threshold voltage of said gate electrode of said periphery NMOS transistor being set at least in part by the mole fraction of said midgap material components of said gate electrode of said NMOS transistor and an accordingly reduced amount of channel dopant;
- and
- a periphery PMOS transistor having a gate electrode comprising a midgap material containing at least two material components, the threshold voltage of said gate electrode of said periphery PMOS transistor being set at least in part by the mole fraction of said midgap material components of said gate electrode of said PMOS transistor and an accordingly reduced amount of channel dopant.
A method of forming an access transistor of a DRAM, comprising:
- forming a gate electrode of said access transistor, said gate electrode of said access transistor comprising a midgap material containing at least two material components;
- tailoring the workfunction of said gate electrode by controlling the mole fraction of said midgap material components;
- setting the threshold voltage of said access transistor at least in part by said controlling of said mole fraction of said midgap material components.
A method of forming a semiconductor device, comprising:
- forming a gate electrode of an access transistor, said gate electrode of said access transistor comprising a midgap material containing at least two material components;
- forming a gate electrode of a periphery NMOS logic transistor, said gate electrode of said periphery NMOS logic transistor comprising a midgap material containing at least two material components;
- forming a gate electrode of a periphery PMOS logic transistor, said gate electrode of said periphery PMOS logic transistor comprising a midgap material containing at least two material components;
- tailoring the workfunction of each said gate electrode at least in part by controlling the mole fraction of said midgap material components of each said gate electrode;
- setting the threshold voltage of each said transistor at least in part by said controlling of said mole fraction of said midgap materials of each said gate electrode.
A method of forming a DRAM access transistor, comprising:
- providing a semiconductor substrate;
- providing a gate oxide over said semiconductor substrate;
- forming a P+ silicon germanium layer over said gate oxide to form a gate electrode of said access transistor;
- controlling the mole fraction of said germanium deposited to form said gate electrode to tailor the workfunction of said gate electrode;
- and
- setting the threshold voltage of said access transistor in accordance with said tailored workfunction of said gate electrode and by reducing the concentration of implanted enhancement dopant for the channel of said transistor in accordance with the mole fraction of said germanium.
A method of improving DRAM access transistor refresh, comprising:
- reducing the concentration of dopant for the channel region of said access transistor;
- depositing a midgap material containing at least two material components to form a gate electrode of said access transistor;
- and
- tailoring the workfunction of said gate electrode by controlling the mole fraction of said midgap material components, wherein the threshold voltage of said gate electrode is set at least in part by said mole fraction of said midgap material components and said concentration of said dopant is reduced in accordance with said mole fraction of said midgap material components.
Dependencies are inferred from the claim text.