Matched transistors and methods for forming the same

A matched SOI multiple FET structure within an STI region comprising:

• a substrate having a substrate layer on an insulator layer;
• distal diffusion regions in the substrate layer of a first conductivity type and a central diffusion region in the substrate layer of said first conductivity type, the central diffusion region having a width and between a first extrusion and a second extrusion extending from a surface of the substrate layer downward only partially into the substrate layer so as not to contact the insulator layer, the distal diffusion regions contacting the insulator layer;
• a first gate on the surface of the substrate layer overlapping at least one of the distal diffusion regions and the central diffusion region, said first gate having said first extrusion that extends toward a second gate;
• said second gate on the surface of the substrate layer overlapping at least one of the distal diffusion regions and the central diffusion region, said second gate having said second extrusion that extends toward said first gate;
• and
• a pair of body regions of a second conductivity type extending from a surface of the substrate layer down to the insulator layer, each body region under one of the gates for forming a channel between said one of the distal diffusion regions and the central diffusion region, said pair of body regions being in contact with each other directly under said central diffusion region,
• wherein said first and second extrusions allow for said body regions in contact with each other to be in electrical communication under said central diffusion region, said structure being isolated via said STI region.