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AssigneeNEC Corporation
InventorsYuji Ando, Hironobu Miyamoto, Naotaka Iwata, Koji Matsunaga, Masaaki Kuzuhara, Kensuke Kasahara, Kazuaki Kunihiro, Yuji Takahashi, Tatsuo Nakayama, Nobuyuki Hayama, Yasuo Ohno
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A hetero-junction FET has an intermediate layer including n-type-impurity doped layer between an electron supply layer and an n-type cap layer. The intermediate layer cancels the polarized negative charge generated between the electron supply layer and the n-type cap layer by ionized positive charge, thereby reducing the barrier against the electrons and source/drain resistance.
A hetero-junction filed effect transistor (HJFET) comprising a substrate, a layer structure including an InxGa1−xN (0≦x≦1) channel layer, an AlyGa1−yN (0<y≦1) electron supply layer, at least one intermediate layer and an n-type GaN cap layer consecutively formed on said substrate, a gate electrode disposed in contact with said electron supply layer, and source and drain electrodes disposed in contact with said n-type cal layer, said at least one intermediate layer being formed as a single n-type-impurity doped layer or a plurality of stacked layers including at least one n-type-impurity doped layer,
A hetero-junction filed effect transistor (HJFET) comprising a substrate, a layer structure including an InxGa1−xN (0≦x ≦1) channel layer, an AlyGa1−yN (0<y<1) electron supply layer, at least one intermediate layer and an n-type InuGa1−uN cap layer consecutively formed on said substrate, a gate electrode disposed in contact with said electron supply layer, and source and drain electrodes disposed in contact with said n-type cap layer, said at least one intermediate layer being formed as a single n-type-impurity doped layer or a plurality of stacked layers including at least one n-type-impurity doped layer,
Dependencies are inferred from the claim text.