Semiconductor device manufacturing method permitting suppression of leak current through the PN junction

A method of manufacturing a semiconductor device, comprising:

• forming a gate oxide film on a semiconductor substrate;
• forming selectively a plurality of first gates a first distance apart from each other and a plurality of second gates a second distance, which is larger than said first distance, apart from each other on said gate oxide film;
• forming a first diffusion layer on the surface of said semiconductor substrate with said first and second gates used as a mask;
• forming an insulating film having a first thickness on the entire surface;
• etching said insulating film by isotropic etching to decrease the thickness to a second thickness thinner than the first thickness;
• etching the insulating film to form a first side wall insulating film on the side wall of each of the first gates, said first side wall insulating film covering that region of the semiconductor substrate which is positioned between adjacent first gates, and to form a second side wall insulating film on the side wall of each of said second gates such that the semiconductor substrate surface positioned between adjacent second gates is exposed to the outside;
• and
• introducing an impurity into the surface region of the semiconductor substrate with the first and second gates and the first and second side wall insulating films used as a mask to form a second diffusion layer having an impurity concentration higher than that in the first diffusion layer in that region of the surface of the semiconductor substrate which is positioned between adjacent second side wall insulating films.