Method to reduce microloading in metal etching

A method of forming metal lines without microloading in the fabrication of an integrated circuit comprising:

• providing semiconductor device structures in and on a semiconductor substrate;
• covering said semiconductor device structures with an insulating layer;
• depositing a barrier metal layer overlying said insulating layer;
• depositing a metal layer overlying said barrier metal layer;
• depositing an anti-reflective coating layer overlying said metal layer;
• covering said anti-reflective coating layer with a layer of photoresist;
• exposing said photoresist layer to actinic light and developing and patterning said photoresist layer to form the desired photoresist mask wherein there are both wide spaces and narrow spaces between portions of said photoresist mask and wherein said narrow spaces are less than about 0.6 microns in width;
• etching away said antireflective coating layer and said metal layer not covered by said photoresist mask wherein said barrier metal layer is reached within said wide spaces while some of said metal layer remains within said narrow spaces;
• selectively etching away all of said metal layer remaining within said narrow spaces;
• thereafter etching away said barrier metal layer not covered by said photoresist mask wherein said insulating layer is reached within said wide spaces while some of said barrier metal layer remains within said narrow spaces;
• selectively etching away all of said barrier metal layer remaining within said narrow spaces;
• and
• thereafter overetching said insulating layer not covered by said photoresist mask to form said metal lines without microloading to complete said fabrication of said integrated circuit.

A method of forming metal lines without microloading in the fabrication of an integrated circuit comprising:

• providing semiconductor device structures in and on a semiconductor substrate;
• covering said semiconductor device structures with an insulating layer;
• depositing a barrier metal layer overlying said insulating layer;
• depositing a metal layer overlying said barrier metal layer;
• depositing an anti-reflective coating layer overlying said metal layer;
• covering said anti-reflective coating layer with a layer of photoresist;
• exposing said photoresist layer to actinic light and developing and patterning said photoresist layer to form the desired photoresist mask wherein there are both wide spaces and narrow spaces between portions of said photoresist mask and wherein said narrow spaces are less than about 0.6 microns in width;
• etching away said antireflective coating layer and said metal layer not covered by said photoresist mask wherein said barrier metal layer is reached within said wide spaces while some of said metal layer remains within said narrow spaces;
• selectively etching away all of said metal layer remaining within said narrow spaces using an etch recipe that is selective to said metal layer with respect to said barrier metal layer;
• thereafter etching away said barrier metal layer not covered by said photoresist mask wherein said insulating layer is reached within said wide spaces while some of all of said barrier metal layer remains within said narrow spaces;
• selectively etching away said barrier metal layer remaining within said narrow spaces using an etch recipe that is selective to said barrier metal layer with respect to said insulating layer;
• and
• thereafter overetching said insulating layer not covered by said photoresist mask to form said metal lines without microloading to complete said fabrication of said integrated circuit.