Electrically blowable fuse with reduced cross-sectional area

A method of forming a semiconductor fuse between a plurality of gate conductor stacks and for connecting a plurality of wiring lines, said method comprising steps of:

• etching a trench between adjacent gate conductor stacks, such that said trench has a smallest possible photolithographic width;
• forming insulating spacers in said trench on adjacent gate conductor stacks;
• shaping said trench between adjacent ones of said conductors, such that said trench has a first width in a top region and a second width, smaller than said first width, in a bottom region,
• filing said trench with a conductive material, wherein said conductive material has a width dependent etch rate;
• etching said conductive material to form a fuse element, such that said conductive material remains in said bottom region and is removed from said top region;
• and
• connecting said wiring lines to said fuse element.

A method of forming a semiconductor device for connecting a plurality of wiring lines, said method comprising steps of:

• forming a plurality of conductors comprising steps of depositing a conductive layer, depositing an insulating layer above said conductive layer, and etching said conductive layer and said insulating layer to form a trench between adjacent ones of said conductors;
• undercutting said conductive layer under said insulating layer;
• forming conformal first spacers on said insulating layer and said conductive layer in said trench;
• forming second spacers in said trench on said first spacers at a same layer level as said conductive layer, such that an area of said trench equal to an amount of said undercutting is filled by said second spacers;
• and
• filling said trench with a fuse element, said fuse element covering said first spacers and said second spacers;
• and
• connecting said wiring lines to said fuse element.

A method of forming a semiconductor device for connecting a plurality of wiring lines, said method comprising steps of:

• forming a plurality of gate conductor stacks comprising steps of depositing a conductive layer, depositing an insulating layer above said conductive layer, and etching said conductive layer and said insulating layer to form a trench between adjacent ones of said gate conductor stacks;
• undercutting said conductive layer under said insulating layer;
• forming conformal nitride spacers on said insulating layer and said conductive layer in said trench;
• depositing tetraethylorthosilicate in said trench and on said nitride spacers, such that an area of said trench equal to an amount of said undercutting is filled by said tetraethylorthosilicate;
• shaping said trench such that said trench has a first width in a top region and a second width, smaller than said first width, in a bottom region,
• filing said trench with a conductive material, wherein said conductive material has a width dependent etch rate;
• etching said conductive material to form a fuse element, such that said conductive material remains in said bottom region and is removed from said top region;
• and
• connecting said wiring lines to said fuse element.