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US 6,548,337 B2Granted
Method of manufacturing a high gain bipolar junction transistor with counterdoped base in CMOS technology
AssigneeInstruments S.A.
InventorsChi-Cheong Shen, David B. Spratt, Michael D. Aragon, Kamel Benaissa
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Abstract
A method is described for forming a high gain bipolar junction transistor in a optimized CMOS integrated circuit. The bipolar junction transistor comprises a compensated base region (130) which is formed by forming the p-well region (20) and the n-well region (30) in a common substrate region.
Claims14
A method for forming a bipolar junction transistor on an integrated circuit comprising:
- providing a semiconductor substrate:
- forming a p-well region in said semiconductor substrate by performing p-well ion implantation comprising p-type dopant species;
- forming a n-well region in said semiconductor substrate by performing n-well ion implantation comprising n-type dopant species;
- and
- forming a compensated base region of said bipolar junction transistor by allowing said p-well ion implantation and said n-well ion implantation to enter a common region of said semiconductor substrate.
2 more elements
A method for forming a bipolar junction transistor on an integrated circuit comprising:
- providing a semiconductor substrate;
- forming a p-well region in said semiconductor substrate by performing p-well ion implantation comprising p-type dopant species;
- forming a n-well region in said semiconductor substrate by performing n-well ion implantation comprising n-type dopant species;
- forming a deep well region in said semiconductor substrate by performing deep well ion implantation comprising p-type dopant species, n-type dopant species, or both p-type and n-type dopant species;
- and
- forming a compensated base region of said bipolar junction transistor by allowing said p-well ion implantation and said n-well ion implantation to enter said deep well region of said semiconductor substrate.
3 more elements
Dependencies are inferred from the claim text.