Method for high aspect ratio gap fill using sequential HDP-CVD
AssigneeInfineon Technologies AG
InventorsAndreas Knorr, Mihel Seitz
Life of this patent
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Abstract
A method of providing isolation between element regions of a semiconductor memory device (200). Isolation trenches (211) are filled using several sequential anisotropic insulating material (216/226/230) HPD-CVD deposition processes, with each deposition process being followed by an isotropic etch back to remove the insulating material (216/226/230) from the isolation trench (211) sidewalls. A nitride liner (225) may be deposited after isolation trench (211) formation. A top portion of the nitride liner (225) may be removed prior to the deposition of the top insulating material (230) layer.
Claims23
A method of filling gaps between features of a semiconductor wafer, the gaps having sidewalls, the method comprising:
- depositing a first anisotropic insulating material over the wafer to partially fill the gaps;
- removing the first anisotropic insulating material from at least the gap sidewalls using an isotropic etch process;
- and
- depositing a second anisotropic insulating material over the wafer to at least partially fill the gaps.
A method of isolating element regions of a semiconductor memory device, the memory device including a plurality of isolation trenches separating a plurality of element regions, the isolation trenches including sidewalls, the method comprising:
- depositing a first insulating material over the isolation trenches;
- removing a portion of the first insulating material from at least over the isolation trench sidewalls using an isotropic process;
- and
- depositing a second insulating material over the trenches.
Dependencies are inferred from the claim text.