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US 6,486,051 B1Granted
Method for relieving bond stress in an under-bond-pad resistor
AssigneeIntel Corporation
InventorsGregory D. Sabin, William J. Gross, Jung-Yueh Chang
Life of this patent
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Abstract
The present invention is a method and structure for placing resistive circuits underneath a bonding pad in integrated circuit devices such that the resistive circuits are protected from shear and compressive stresses during bonding processes. The resistor is a serpentine wire pattern. A bonding pad is formed above the resistor such that the serpentine pattern extends over the entire bond pad area. The method and structure allow the formation of IC devices with smaller die areas.
Claims31
A method comprising:
- forming an active circuit on a silicon substrate, wherein said active circuit is selected from the group consisting of a resistor, inductor, capacitor, and a transistor;
- depositing a wire resistor above said active circuit, said wire resistor having a resistance value determined according to the design requirements of the active circuit, hence, said wire resistor being configured to act as an active device for the active circuit;
- depositing a dielectric layer on said wire resistor;
- and
- forming a bonding pad on said dielectric layer.
2 more elements
A method comprising:
- forming an active circuit on a silicon substrate;
- depositing a wire resistor above said active circuit, said wire resistor having a resistance value determined according to the design requirements of the active circuit, hence, said wire resistor being configured to act as an active device for the active circuit, and wherein said wire resistor is formed by depositing a silicon layer or a metal layer on the field oxide layer and patterning the silicon or metal layer to have multiple, adjacent windings in a serpentine pattern;
- depositing a dielectric layer on said wire resistor, said dielectric layer and said wire resistor coupled to act as a stress reducers during a subsequent bonding process;
- and
- forming a bonding pad on said dielectric layer.
2 more elements
A method comprising:
- forming an active circuit on a silicon substrate, wherein said active circuit includes a field oxide layer and a wire resistor on the field oxide layer, said wire resistor having multiple windings in a serpentine pattern, and wherein said active circuit is selected from the group consisting of a resistor, inductor, capacitor, and a transistor, said wire resistor having a resistance value determined according to the design requirements of the active circuit, hence, said wire resistor being configured to act as an active device for the active circuit;
- depositing a dielectric layer on said wire resistor, said dielectric layer and said wire resistor coupled to act as a stress reducers during a subsequent bonding process;
- and
- forming a bonding pad over said dielectric layer.
1 more element
A method comprising:
- forming an active circuit on a silicon substrate, wherein said active circuit includes a wire resistor in a serpentine pattern having multiple windings wherein the width of the wire is no bigger than the space between any two adjacent windings of said serpentine pattern, said wire resistor having a resistance value determined according to the design requirements of the active circuit, hence, said wire resistor being configured to act as an active device for the active circuit;
- depositing a dielectric layer on said wire resistor;
- and
- forming a bonding pad on said dielectric layer, wherein the wire resistor extends to, at least, the size of bonding pad area.
1 more element
A method comprising:
- forming a first active circuit on a silicon substrate;
- forming a second active circuit above said first active circuit, wherein said second active circuit includes a wire resistor, and wherein said second active circuit is selected from the group consisting of a resistor, inductor, capacitor, and a transistor, said wire resistor having a resistance value determined according to the design requirements of the active circuit, hence, said wire resistor being configured to act as an active device for the active circuit;
- depositing a dielectric layer on said wire resistor;
- and
- forming a bonding pad on said dielectric layer.
2 more elements
A method comprising:
- forming a first active circuit above a silicon substrate;
- forming a second active circuit above said first active circuit, wherein said second active circuit includes a wire resistor, said wire resistor having multiple, adjacent windings in a serpentine pattern, wherein the width of the wire resistor is no bigger than the space between any two adjacent windings, and said wire resistor having a resistance value determined according to the design requirements of the active circuit, hence, said wire resistor being configured to act as an active device for the active circuit;
- depositing a dielectric layer on said wire resistor, said dielectric layer and said wire resistor coupled to act as a stress reducers during a subsequent bonding process;
- and
- forming a bonding pad on said dielectric layer, wherein the wire resistor extends to, at least, the size of bonding pad area.
2 more elements
Dependencies are inferred from the claim text.