Integrated circuit design incorporating a power mesh
AssigneeLSI Logic Corporation
InventorsChun Chan, Tammy Huang, Mike Liang
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AssigneeLSI Logic Corporation
InventorsChun Chan, Tammy Huang, Mike Liang
Estimating the term…
Provided is a technique for designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer. Electronic components are laid out on the semiconductor layer, and a primary power distribution network for distributing power to the electronic components is laid out on the primary metal layer. Then, a uniform trunk width is calculated for all trunks in a power mesh based on a desired maximum voltage drop for the generated electronic component layout. Finally, horizontal power trunks are laid out on the horizontal metal layer and vertical power trunks are laid out on the vertical metal layer using the calculated uniform trunk width, so as to form the power mesh, and an electrical connection is specified between the power mesh and the primary power distribution network.
A method for use in designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer, said method comprising:
A method for use in designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer, said method comprising:
Computer-executable process steps stored on a computer readable medium, said process steps for use in designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer, said process steps comprising:
An apparatus for use in designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer, said apparatus comprising:
A method for use in designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer, said method comprising:
Computer-executable process steps stored on a computer readable medium, said process steps for use in designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer, said process steps comprising:
An apparatus for use in designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer, said apparatus comprising:
Dependencies are inferred from the claim text.