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US 6,479,883 B1Granted
Electrostatic discharge protection circuit
AssigneeUnited Microelectronics Corp.
InventorsShiao-Shien Chen, Tien-Hao Tang
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AssigneeUnited Microelectronics Corp.
InventorsShiao-Shien Chen, Tien-Hao Tang
Estimating the term…
An electrostatic discharge protection circuit formed between an input/output pad and an internal circuit that can be applied to a silicon-on-insulator type of MOSFET. The protection circuit includes two n-type tunneling source-body contact devices connected in a series to form two sets of parasitic diode/zener diode pairs that serve as electrostatic discharge routes. When an excessive positive voltage or negative voltage is applied, one of the n-type tunneling source-body contact devices becomes a conductive NMOS transistor forming a discharge route for electrostatic charges. Meanwhile, the other n-type device operates reversely and acts like a zener diode when a definite voltage is exceeded. The zener diode, together with a parasitic diode, provides another discharge route for electrostatic charges.
An electrostatic discharge protection circuit between an input/output pad and an internal circuit, comprising:
An electrostatic discharge protection (ESD) circuit structure between an input/output pad and an internal circuit, wherein the ESD circuit is formed on a silicon-on-insulation (SOI) substrate and the SOI substrate includes a semiconductor substrate, an insulating layer on the semiconductor substrate, and a silicon layer on the insulating layer, the ESD circuit structure formed on the SOI substrate comprising:
Dependencies are inferred from the claim text.