Semiconductor device with enhanced protection from electrostatic breakdown
AssigneeRohm Co., Ltd.
InventorNoriaki Hiraga
Life of this patent
Estimating the term…
Abstract
A semiconductor device is provided that is resistant to electrostatic breakdown by forming active elements for enhancing the protection capability by utilizing a guard ring. A circuit formation region is allocated on one surface of a one-chip substrate. Internal circuits, each surrounded by an associated guard ring are provided in the circuit formation region, and external connection terminals are provided outside the internal circuits. The internal circuits are connected to some of the external connection terminals and power lines. Each of the active elements, which become conductive when a voltage on one of the power lines exceeds a proper operating voltage of the internal circuit, is formed parasitic to the guard ring.
Claims24
A semiconductor device comprising:
- a one-chip substrate having a circuit formation region allocated on one surface thereof;
- a plurality of external connection terminals arranged on said one surface outside said circuit formation region;
- an internal circuit provided in said circuit formation region;
- a power line connected to one of said external connection terminals and to said internal circuit;
- a guard ring formed in said circuit formation region to surround said internal circuit;
- active elements formed parasitic to said guard ring, formed along said guard ring, formed overlying said guard ring, and connected to said power line, each of said active elements being operable to maintain a blocking state when a voltage applied from said power line is equal to or lower than a proper operating voltage for said internal circuit, and each of said active elements being operable to become conductive when said applied voltage exceeds said proper operating voltage for said internal circuit before said applied voltage reaches a breakdown voltage of said internal circuit;
- and
- capacitive elements formed parasitic to said guard ring, formed along said guard ring, formed overlying said guard ring, and connected to said power line.
A semiconductor device comprising:
- a one-chip substrate having a circuit formation region allocated on one surface thereof;
- a plurality of external connection terminals arranged on said one surface outside said circuit formation region;
- internal circuits provided in said circuit formation region;
- a plurality of power lines arranged on said one surface, each of said power lines is connected to one of said external connection terminals and to one of said internal circuits respectively;
- an inter-circuit signal wire extending between said internal circuits;
- a plurality of guard rings formed in said circuit formation region, each of said guard rings is surrounding each of said internal circuits;
- and
- active elements formed parasitic to said guard ring, and connected to said power line, each of said active elements being operable to maintain a blocking state when a voltage applied from said power line is equal to or lower than a proper operating voltage for said internal circuit, and each of said active elements being operable to become conductive when said applied voltage exceeds said proper operating voltage for said internal circuit before said applied voltage reaches a breakdown voltage of said internal circuits;
- wherein said active elements positioned near a side of each of said internal circuits along which said internal circuits border each other.
Dependencies are inferred from the claim text.