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US 6,476,477 B2Granted
Electronic assembly providing shunting of electrical current
AssigneeIntel Corporation
InventorsYuan-Liang Li, David G. Figueroa, Priyavadan R. Patel
Life of this patent
Estimating the term…
Abstract
The invention provides an electronic assembly including a semiconductor chip and a semiconductor package substrate having power and ground shunts. The power and ground shunts of the semiconductor chip include contact pads on a surface thereof that are electrically connected to one another to protect electrical signal contacts on the contact pads from high, low-frequency current. The power shunt in the semiconductor package substrate connects one power plane to another and the ground shunts in the semiconductor package substrate connects one ground plane to another. The power and ground shunts in the semiconductor package substrate dictate terminal pins thereon from high, low-frequency current.
Claims25
A semiconductor chip comprising:
- a semiconductor substrate;
- an integrated circuit of electrical components on the semiconductor substrate;
- a first insulation layer on the integrated circuit;
- a plurality of voltage lines over the first insulation layer;
- a plurality of voltage vias in the first insulation layer, each connecting a respective electrical component to a respective voltage line;
- a final insulation layer over the voltage lines, from the substrate to the final insulation layer forming part of a composite stack of layers formed directly on one another;
- a plurality of voltage contact pads on the final insulation layer;
- a plurality of voltage vias in the final insulation layer, each electrically connecting a respective voltage line to a respective voltage contact pad, a plurality of series connections being formed, each from and including a respective voltage via in the first insulation layer up to and including a respective one of the voltage contact pads;
- and
- a voltage shunt connection located above the first insulation layer and having portions contacting the series connections so as to electrically connect the voltage lines to one another.
7 more elements
A semiconductor chip comprising:
- a semiconductor substrate;
- an integrated circuit of electrical components on the semiconductor substrate;
- a first insulation layer on the integrated circuit;
- a plurality of voltage lines over the first insulation layer;
- a plurality of drain lines over the first insulation layer;
- a plurality of voltage vias in the first insulation layer, each connecting a respective electrical component to a respective voltage line;
- a plurality of drain vias in the first insulation layer, each connecting a respective electrical component to a respective drain line;
- a final insulation layer over the voltage lines and the drain lines;
- a plurality of voltage contact pads on the final insulation layer;
- a plurality of drain contact pads on the final insulation layer;
- a plurality of voltage vias in the final insulation layer, each electrically connecting a respective voltage line to a respective voltage contact pad;
- a plurality of drain vias in the final insulation layer, each electrically connecting a respective drain line to a respective drain contact pad;
- a voltage shunt connection electrically connecting the voltage lines to one another;
- a drain shunt connection electrically connecting the drain lines to one another;
- a plurality of signal vias in the final insulation layer, each connecting a respective signal line to a respective signal contact pad;
- a voltage shunt connection electrically connecting the voltage lines to one another;
- and
- a drain shunt connection electrically connecting the drain lines to one another.
15 more elements
A semiconductor chip comprising:
- a semiconductor substrate;
- an integrated circuit of electrical components on the semiconductor substrate;
- a first insulation layer on the integrated circuit;
- a plurality of voltage lines over the first insulation layer;
- a plurality of drain lines over the first insulation layer;
- a plurality of signal lines over the first insulation layer;
- a plurality of voltage vias in the first insulation layer, each connecting a respective electrical component to a respective voltage line;
- a plurality of drain vias in the first insulation layer, each connecting a respective electrical component to a respective drain line;
- a plurality of signal vias in the first insulation layer, each connecting a respective electrical component to a respective signal line;
- a final insulation layer over the voltage lines and the drain lines;
- a plurality of voltage contact pads on the final insulation layer;
- a plurality of drain contact pads on the final insulation layer;
- a plurality of signal contact pads on the final insulation layer;
- a plurality of voltage vias in the final insulation layer, each electrically connecting a respective voltage line to a respective voltage contact pad;
- a plurality of drain vias in the final insulation layer, each electrically connecting a respective drain line to a respective drain contact pad;
- a voltage shunt connection electrically connecting the voltage lines to one another;
- and
- a drain shunt connection electrically connecting the drain lines to one another.
15 more elements
A semiconductor chip comprising:
- a semiconductor substrate;
- an integrated circuit of electrical components on the semiconductor substrate;
- a first insulation layer on the integrated circuit;
- a plurality of voltage lines over the first insulation layer;
- a plurality of drain lines over the first insulation layer;
- a plurality of voltage vias in the first insulation layer, each connecting a respective electrical component to a respective voltage line;
- a plurality of drain vias in the first insulation layer, each connecting a respective electrical component to a respective drain line;
- a final insulation layer over the voltage and drain lines;
- a plurality of voltage contact pads on the final insulation layer;
- a plurality of voltage vias in the final insulation layer, each electrically connecting a respective voltage line to a respective voltage contact pad;
- a plurality of drain contact pads on the final insulation layer;
- a plurality of drain vias in the final insulation layer, each connecting a respective drain line to a respective drain contact pad;
- a voltage shunt connection electrically connecting the voltage lines to one another;
- and
- a drain shunt connection electrically connecting the drain lines to one another.
12 more elements
Dependencies are inferred from the claim text.