Stacked gate MOS structure for multiple voltage power supply applications
AssigneeTaiwan Semiconductor Manufacting Company, Ltd.
InventorsMong-Song Liang, Jin-Yuan Lee, Choe-San Yoo
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AssigneeTaiwan Semiconductor Manufacting Company, Ltd.
InventorsMong-Song Liang, Jin-Yuan Lee, Choe-San Yoo
Estimating the term…
A capacitor structure is formed on a semiconductor substrate to provide split voltages for semiconductor circuits. An active area is formed in the substrate serving as a lower capacitor plate for a bottom capacitor. A thin dielectric layer and field oxide regions are formed on the substrate, and the dielectric layer is covered with a capacitor plate over the active area to complete the bottom capacitor. A thick dielectric layer is formed over the device and a via is formed through the thick dielectric layer to the upper capacitor plate. A second lower plate is formed for a top capacitor. An inter-layer dielectric layer is formed over the second lower plate. An upper capacitor layer is formed over the inter-layer dielectric layer to form a top capacitor with a different capacitance value from the bottom capacitor. The value of the capacitance can be varied by selection of the permittivity and/or thickness of the dielectric layer and by variation of the effective plate area of the top and bottom capacitors.
A semiconductor device formed on a semiconductor substrate includes capacitor is formed to provide split voltages for semiconductor circuits, said device comprising:
A semiconductor device on a semiconductor substrate includes a capacitor provided to split voltages for semiconductor circuits, said device comprising:
Dependencies are inferred from the claim text.