Carrier assembly for semiconductor IC (integrated circuit) packages

A carrier assembly for containment of semiconductor chip packages during manufacturing and testing operations, and comprising:

• a tray component having a tray-orienting chamfer and a tray-orienting scallop, and having multiple semiconductor chip package open pockets formed in a tray deck that each have multiple integrally formed depending support legs that terminate in a semiconductor chip support shelves;
• a cover component having a tray-orienting chamfer and a tray-orienting scallop, and having multiple semiconductor chip package pocket openings formed in a cover deck that are positioned in registration with said tray component package open pockets and that each have multiple integrally formed depending clamping legs positioned to nest within said tray component multiple semiconductor chip package open pocket depending support legs when said cover component is assembled to said tray component;
• and
• multiple snap latch components that are each comprised of a latch receptacle element formed integrally with said tray component and a snap latch element formed integrally with said cover component, said cover component semiconductor chip package pocket opening depending clamping legs and said tray component semiconductor chip open pocket depending support legs and support shelves functioning to fixedly position contained semiconductor chip packages relative to the carrier assembly throughout all possible orientations when said multiple snap latch components secure said cover component to said tray component.