Flash memory device
AssigneeHyundai Electronics Industries Co., Ltd.
InventorsBong Kil Kim, Sung Mun Jung
Life of this patent
Estimating the term…
Abstract
A flash memory device is configured to address the problems that charges generated when via hole is etched is charged to a junction region through a metal line and are thus concentrated on a tunnel oxide film, thus making distribution of a threshold voltage over a cell uneven when a device is driven. In order to solve the problems, the device has a junction region in an outside circuit region so charges generated when via hole is etched is concentrated on the junction region formed in the outside circuit region. Thus, it can prevent concentration of the charges on the cell and thus make uniform distribution of the threshold voltage over a cell array.
Claims17
A flash memory device, comprising:
- a flash memory cell formed in a cell array region of a substrate in which the cell array region and an outside circuit region are defined, the flash memory cell having a source region and a drain region in said cell array region;
- a first junction region formed in said outside circuit region;
- a first metal contact formed on said source region;
- second and third metal contacts formed on said first junction region;
- a first metal line connecting said first metal contact and said second metal contact;
- a second metal line connected to said third metal contact;
- and
- a via hole formed on said second metal line.
A flash memory device, comprising:
- a flash memory cell formed in a cell array region of a substrate in which the cell array region and an outside circuit region are defined, the flash memory cell having a source region and a drain region in said cell array region;
- first and second junction regions formed in said outside circuit region;
- a first metal contact formed on said source region;
- second and third metal contacts formed on said first junction region and a fourth metal contact formed on said second junction region;
- a first metal line connecting said first metal contact and said second metal contact;
- a second metal line connecting said third metal contact and said fourth metal contact;
- and
- a via hole formed on said second metal line.
A flash memory device, comprising:
- a substrate having a cell array region and an outside circuit region;
- a flash memory cell having an associated source region and a drain region, all formed in the cell array region;
- a first junction region formed in the outside circuit region;
- a first metal contact formed on the source region;
- second and third metal contacts formed on the first junction region;
- a first metal line connecting the first metal contact to the second metal contact;
- a second metal line connected to the third metal contact;
- and
- a via hole formed on the second metal line.
Dependencies are inferred from the claim text.