Electrostatic discharge protection circuit
AssigneeConexant Systems, Inc.
InventorEugene Robert Worley
Life of this patent
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Abstract
An electrostatic discharge protection circuit for protecting the output of a CMOS circuit includes the use of a saturation attenuation resistor in series with the output. The saturation attenuation resistor exhibits a low resistance value under low current conditions and a high resistance value under high current conditions. The saturation resistor in series with the output of a CMOS circuit thus has little effect on the current drive capability of that circuit during its normal operation. Upon the application of a high current ESD transient to the output, however, the saturation resistor assumes a high resistance value that acts to attenuate the voltage of the transient and protect the delicate gate dielectric of transistors at the output of the circuit.
Claims14
A CMOS circuit comprising:
- a circuit function having an output;
- an output terminal;
- and
- a saturation attenuation resistor coupling the output to the output terminal, wherein the saturation attenuation resistor includes a substrate of a first conductivity type, a well region of a second conductivity type and first and second spaced apart contact areas of the second conductivity type formed in the well region.
An electrostatic discharge protection circuit for protecting the output of an MOS circuit, the protection circuit comprising:
- a first diode coupled between the output and a first reference potential;
- a second diode coupled between the output and a second reference potential;
- a third diode coupled between an output terminal and the first reference potential;
- a fourth diode coupled between the output terminal and the second reference potential;
- and
- a saturation resistor coupled between the output and the output terminal.
An electrostatic discharge protection circuit for protecting an output of a MOS circuit, the protection circuit comprising:
- an output terminal;
- a saturation resistor coupled between the output and the output terminal;
- an impedance device coupled between the output terminal and a reference potential;
- a substrate of a first conductivity type;
- and
- a well region of a second conductivity type, and wherein the saturation resistor comprises a first and second spaced apart contact areas of the second conductivity type formed in the well region.
Dependencies are inferred from the claim text.