Coherent carbide diffusion barrier for integrated circuit interconnects

An integrated circuit comprising:

• a semiconductor substrate having a semiconductor device provided thereon;
• a device dielectric layer formed on the semiconductor substrate;
• a carbon containing low dielectric constant channel dielectric layer formed on the device dielectric layer having a channel opening provided therein;
• a conductor core filling the channel opening and connected to the semiconductor device;
• and
• a barrier layer ling the channel opening under the conductor core, the barrier layer of a carbide forming metal in an alloy with a conductor core metal and in a compound with carbon of the carbon containing low dielectric constant channel dielectric layer whereby the barrier layer is coherently bonded with the carbon containing low dielectric constant channel dielectric layer. is alloyed to the material of the conductor core, and forms a barrier to diffusion of the material of the conductor core to the carbon containing low dielectric constant channel dielectric layer.

A method of manufacturing an integrated circuit comprising the steps of:

• providing a semiconductor substrate having a semiconductor device provided thereon;
• forming a carbon containing first dielectric layer formed over the semiconductor substrate;
• forming an opening in the first dielectric layer;
• depositing a barrier layer to line the opening;
• depositing a conductor core over the barrier layer to fill the opening and connect to the semiconductor device;
• and
• thermal treatment of the semiconductor substrate whereby the barrier layer is reacted with the first dielectric layer to form a metal carbide, is alloyed to the material of the conductor core, and forms a barrier to diffusion of the material of the conductor core to the first dielectric layer.

A method of manufacturing an integrated circuit comprising the steps of:

• providing a semiconductor substrate having a semiconductor device provided thereon;
• forming a device dielectric layer on the semiconductor substrate;
• forming a carbon containing low dielectric constant channel dielectric layer on the device dielectric layer;
• forming a channel opening in the channel dielectric layer;
• depositing a barrier layer to line the channel opening;
• and
• thermal treatment of the semiconductor substrate whereby the barrier layer is reacted with the channel dielectric layer to form a metal carbide, is alloyed to the material of the conductor core, and forms a barrier to diffusion of the material of the conductor core to the channel dielectric layer.