Method of manufacturing a flash memory device with an antidiffusion region between well regions
AssigneeHyundai Electronics Industries Co., Ltd.
InventorsByung Hee Cho, Noh Yeal Kwak
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Abstract
There is disclosed a method of manufacturing a flash memory device. In order to solve the problems that a break down voltage between wells is reduced and an insulating characteristic between the wells is lowered due to degraded barrier characteristic between the wells, in a flash memory device employing a triple well structure, the present invention forms an anti-diffusion region for preventing diffusion of dopants between a P-well region and a N-well region by nitrogen ion implantation, thus improving the electrical characteristic of the device.
Claims22
A method of manufacturing a flash memory device, comprising the steps of:
- forming a semiconductor substrate in which field oxide films are formed;
- forming a first photoresist pattern through which a portion of said semiconductor substrate in which a first well region will be formed is exposed, on said semiconductor substrate, and then implanting an impurity ion having an opposite type to said semiconductor substrate to form a first well region;
- after removing said first photoresist pattern, forming a second photoresist pattern through which a portion of said semiconductor substrate in which a second well region will be formed is exposed on said semiconductor substrate, and then implanting ions with an ion implantation process to form an anti-diffusion region;
- implanting an impurity ion of the same type as said semiconductor substrate, into said semiconductor substrate in which said second photoresist pattern is formed, thus forming a second well region;
- and
- performing a thermal process for activating impurities in said first well region, said anti-diffusion region and said second well region, thereby forming a triple-well structure having an anti-diffusion region separating said first and second well regions.
A method of manufacturing a flash memory device, comprising the steps of:
- providing a semiconductor substrate of a first type;
- forming a pair of spaced apart field oxides on the semiconductor substrate to thereby define a first region therebetween;
- forming a first photoresist pattern above the semiconductor substrate such that said first region is exposed;
- implanting a first ion in said first region to thereby form a first well region, the first ion being of a second type with a polarity opposite to a polarity of said first type;
- forming a second photoresist pattern above the semiconductor substrate such that at least a portion of said first region is exposed;
- implanting a second ion in said portion to form an anti-diffusion region above the first well region;
- implanting a third ion in said portion to thereby form a second well region, the third ion being of said first type;
- and
- performing a thermal process for activating impurities in said first well region, said anti-diffusion region and said second well region, thereby forming a triple-well structure having an anti-diffusion region separating said first and second well regions.
The method of manufacturing a flash memory device according to claim 17, wherein boron ions are implanted and the second well region is formed with the ion implantation energy of 0.3 to 1 Mev and at the ion implantation concentration is 1E13 to 5E13 dyne/cm2.
A method of manufacturing a flash memory device, comprising the steps of:
- forming a semiconductor substrate in which field oxide films are formed;
- forming a first photoresist pattern through which a portion of said semiconductor substrate in which a first well region will be formed is exposed, on said semiconductor substrate, and then implanting an impurity ion having an opposite type to said semiconductor substrate to form a first well region;
- after removing said first photoresist pattern, forming a second photoresist pattern through which a portion of said semiconductor substrate in which a second well region will be formed is exposed on said semiconductor substrate, and then implanting ions with an ion implantation process to form an anti-diffusion region;
- implanting an impurity ion of the same type as said semiconductor substrate, into said semiconductor substrate in which said second photoresist pattern is formed, thus forming a second well region;
- and
- performing a thermal process for activating impurities in said first well region, said anti-diffusion region and said second well region, wherein:
- the first photoresist pattern is different in size from the second photoresist pattern;
- and
- implanting ions with an ion implantation process to form an anti-diffusion region, and implanting an impurity ion of the same type as said semiconductor substrate, are both performed using the second photoresist pattern.
A method of manufacturing a flash memory device, comprising the steps of:
- providing a semiconductor substrate of a first type;
- forming a pair of spaced apart field oxides on the semiconductor substrate to thereby define a first region therebetween;
- forming a first photoresist pattern above the semiconductor substrate such that said first region is exposed;
- implanting a first ion in said first region to thereby form a first well region, the first ion being of a second type with a polarity opposite to a polarity of said first type;
- forming a second photoresist pattern above the semiconductor substrate such that at least a portion of said first region is exposed;
- implanting a second ion in said portion to form an anti-diffusion region above the first well region;
- implanting a third ion in said portion to thereby form a second well region, the third ion being of said first type;
- and
- performing a thermal process for activating impurities in said first well region, said anti-diffusion region and said second well region, wherein:
- the first photoresist pattern is different in size from the second photoresist pattern;
- and
- said steps of implanting a second ion and implanting a third ion are both performed using the second photoresist pattern.
Dependencies are inferred from the claim text.