Semi-insulating diffusion barrier for low-resistivity gate conductors

A semiconductor device formed in a semiconductor substrate, the semiconductor device comprising:

• an electrical insulating layer on the substrate;
• a gate electrode on the electrical insulating layer;
• a semi-insulating diffusion barrier layer on the electrode, the semi-insulating diffusion barrier layer having a resistivity above 10−2 ohms-cm and a thickness in Angstroms of less than:
• tiεdb/3εi
• where ti is the thickness of the insulating layer in Angstroms, εdb is the permittivity of the diffusion barrier layer, and εi is the permittivity of the insulating layer, and
• a conductor contacting the diffusion barrier layer so as to electrically contact the electrode, such that a gate electrode charge is induced in the electrode by applying a voltage to the conductor,
• wherein the diffusion barrier layer has a sufficient thickness to effectively block diffusion and intermixing between the conductor and electrode.

A semiconductor device formed in a semiconductor substrate, the semiconductor device comprising:

• an electrical insulating layer on the substrate;
• a gate electrode on the electrical insulating layer;
• a semi-insulating diffusion barrier layer on the electrode, the diffusion barrier layer being formed of a quantum conductive material, having a thickness of less than 25 Angstroms, and having a resistivity above 10−2 ohms-cm;
• and
• a conductor contacting the diffusion barrier layer so as to electrically contact the electrode, such that a gate electrode charge is induced in the electrode by applying a voltage to the conductor;
• wherein the diffusion barrier layer has a sufficient thickness to effectively block diffusion and intermixing between the conductor and electrode.

A semiconductor device formed in a semiconductor substrate, the semiconductor device comprising:

• an electrical insulating layer on the substrate;
• a gate electrode on the electrical insulating layer;
• a semi-insulating diffusion barrier layer on the electrode, the semi-insulating diffusion barrier layer formed of a material selected from the group consisting of silicon oxide, silicon nitride and silicon oxynitride, having a thickness of less than 25 Angstroms, and having a resistivity above 10−2 ohms-cm;
• and
• a conductor contacting the diffusion barrier layer so as to electrically contact the electrode, such that a gate electrode charge is induced in the electrode by applying a voltage to the conductor;
• wherein the diffusion barrier layer has a sufficient thickness to effectively block diffusion and intermixing between the conductor and electrode.

A semiconductor device formed in a semiconductor substrate, the semiconductor device comprising:

• an electrical insulating layer on the substrate;
• a gate electrode on the electrical insulating layer;
• a semi-insulating diffusion barrier layer on the electrode, the semi-insulating diffusion barrier layer having a resistivity above 10−2 ohms-cm and having a thickness of 5 Angstroms or less;
• and
• a conductor contacting the diffusion barrier layer so as to electrically contact the electrode, such that a gate electrode charge is induced in the electrode by applying a voltage to the conductor;
• wherein the diffusion barrier layer has a sufficient thickness to effectively block diffusion and intermixing between the conductor and electrode, and is sufficiently thin to cause charging of the electrode by capacitively coupling between the conductor and the electrode.

A semiconductor device formed in a semiconductor substrate, the semiconductor device comprising:

• an electrical insulating layer on the substrate;
• a gate electrode on the electrical insulating layer;
• a semi-insulating diffusion barrier layer on the electrode, the semi-insulating diffusion barrier layer having a resistivity above 10−2 ohms-cm;
• and
• a conductor contacting the diffusion barrier layer so as to electrically contact the electrode, such that a gate electrode charge is induced in the electrode by applying a voltage to the conductor, the gate electrode charge being at least 75% of the voltage applied to the conductor;
• wherein the diffusion barrier layer has a sufficient thickness to effectively block diffusion and intermixing between the conductor and electrode.