Wiring structure of thin film transistor array and method of manufacturing the same

A method for fabricating a semiconductor device on a substrate comprising the steps of:

• forming a first conductive layer on the substrate;
• forming a first insulation layer on the first conductive layer;
• forming a second conductive layer on the first insulation layer and having a first portion overlapping the first conductive layer;
• forming a second insulation layer on the second conductive layer;
• removing selected portions of the second insulation layer, the second conductive layer and the first insulation layer to form a contact hole at a position corresponding to the first portion of the second conductive layer;
• and
• forming a conductive pad in contact with the first conductive layer and the second conductive layer through the contact hole, wherein the conductive pad is in contact with a surface of the second conductive layer and a side of the second conductive layer.

A method of fabricating a semiconductor device, comprising the steps of:

• forming a first conductive line on a substrate;
• forming an insulation layer over the first conductive line and over the substrate;
• forming a second conductive line on the insulation layer, wherein a portion of the second conductive line partly overlaps a portion of the first conductive line;
• forming a source contact hole in the second conductive line and over the portion of the first conductive line;
• etching the insulation layer by using the second conductive line as a mask;
• and
• forming a connecting pad connecting the second conductive line and the first conductive line, wherein the connecting pad connects to a surface of the second conductive line and a side of the second conductive line.

A method of fabricating a semiconductor device comprising the steps of:

• forming a first conductive line on a substrate;
• forming a insulation layer over the first conductive line and over the substrate;
• forming a second conductive line on the insulation layer, wherein a portion of the second conductive line partly overlaps a portion of the first conductive line;
• forming a source contact hole in the second conductive line and over the portion of the first conductive line;
• forming a protection layer over the substrate, the first conductive line, the insulation layer, and the second conductive line;
• removing a portion of the protection layer over the source contact hole to form a top contact hole;
• forming a gate contact hole in the insulation layer;
• and
• forming a connecting pad connecting the second conductive line and the first conductive line, wherein the connecting pad connects to a surface of the second conductive line and a side of the second conductive line.