Integrated semiconductor circuit with protective structure for protection against electrostatic discharge

In a semiconductor assembly having at least one semiconductor body, an integrated semiconductor circuit disposed in the at least one semiconductor body, an electrically conductive connecting line, at least one terminal pad connected to the integrated semiconductor circuit through the connecting line, at least one first busbar carrying a first supply potential of the integrated semiconductor circuit during operation, at least one second busbar carrying a second supply potential of the integrated semiconductor circuit during operation, and a protector for protecting the integrated semiconductor circuit against electrostatic discharge, the protector disposed between the at least one terminal pad and the integrated semiconductor circuit and connected to one of the at least one first busbar and the at least one second busbar, the protector comprising:

• a partial region having:
• at least one base zone;
• at least one first emitter zone;
• and
• at least one second emitter zone;
• and
• at least one protective element disposed in said partial region, said at least one protective element having:
• switching transistors each having a base terminal, a collector terminal, an emitter terminal, and majority charge carriers of a first conduction type;
• driving transistors each having a base terminal, a collector terminal, an emitter terminal, and majority charge carriers of a second conduction type, said switching transistors and said driving transistors respectively connected by coupling of at least one of said base terminals and said collector terminals to form a thyristor structure;
• at least one first integrated resistor with a resistance connected to said base terminals of said driving transistors and said collector terminals of said switching transistors;
• and
• a buried layer having partial regions with a higher doping concentration than regions of said buried layer outside said partial regions;
• said at least one base zone being a well having said first conduction type and forming said base terminals of said switching transistors and said collector terminals of said driving transistors;
• said at least one first emitter zone being a second well having said second conduction type, being disposed in said at least one base zone, and forming said emitter terminals of every one of said switching transistors;
• and
• said at least one second emitter zone being a third well having said first conduction type, being spaced apart from said at least one base zone by a first distance, and forming said emitter terminals of said driving transistors.