Semiconductor device with floating gates
AssigneeSharp Kabushiki Kaisha
InventorTakuji Tanigami
Life of this patent
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Abstract
A semiconductor device including a plurality of floating gates where each floating gate includes a lower floating gate whose sidewalls are substantially vertical to the semiconductor substrate and an upper floating gate having opposing sidewall portions that gradually widen in a convex manner towards the top of the floating gate. The device further includes an interlayer insulating film, and a control gate formed on the insulating film. An insulating film (10) is provided between and contacting adjacent floating gates, and has vertically aligned lower sidewall portions which contact the lower floating gates and curved upper sidewall portions which contact the upper floating gates and gradually narrow toward the top of the insulating film.
Claims8
A semiconductor memory device comprising:
- a plurality of floating gates formed on a semiconductor substrate;
- an interlayer insulating film formed on the floating gates;
- and
- a control gate formed on the interlayer insulating film;
- wherein at least first and second of the floating gates each comprise a lower floating gate whose sidewalls are substantially vertical relative to the surface of the semiconductor substrate and an upper floating gate formed on the lower gate and in a shape so that opposing sidewall portions of the upper floating gate are concave with respect to the gate interior and the opposing sidewall portions gradually widen towards a top of the upper floating gate, and
- an insulating film having first and second lower sidewall portions substantially vertical relative to the surface of the semiconductor substrate and upper sidewall portions gradually narrowed towards a top of the insulating film in respective correspondence with the shapes of the lower and upper floating gates.
A semiconductor memory device comprising:
- first and second floating gates formed on a semiconductor substrate, each of said first and second floating gates including:
- a lower floating gate whose sidewalls are substantially vertical relative to the semiconductor substrate, and an upper floating gate formed on the lower gate in a shape so that opposing sidewall portions of the upper floating gate gradually widen towards a top of the upper floating gate;
- an interlayer insulating film formed on the first and second floating gates;
- a control gate formed on the interlayer insulating film;
- and
- an insulating film located between and contacting the first and second floating gates, the insulating film having first and second lower sidewall portions that are substantially vertical relative to the surface of the semiconductor substrate and which contact the sidewalls of the lower floating gates of the first and second floating gates, respectively, and wherein the insulating film further includes upper sidewall portions which gradually narrow towards a top of the insulating film.
Dependencies are inferred from the claim text.