Integrated circuit configuration having at least one capacitor and method for producing the same

A DRAM cell configuration having at least one capacitor, comprising:

• a first substrate having a surface and at least one zone adjoining said surface;
• a second substrate having a surface with a region;
• at least two capacitor elements disposed in said at least one zone of said first substrate and spaced apart by a given distance;
• at least one contact disposed in said region of said surface of said second substrate, said at least one contact having a contact surface adjoining at least one of said capacitor elements, said contact surface having a cross section parallel to said surface of said first substrate, and said cross section having at least one dimension larger than said given distance, allowing connection of said at least two capacitor elements in an essentially unadjusted manner;
• and
• said capacitor elements including capacitor elements disposed adjacent said contact surface and forming a capacitor.

A method for producing an integrated circuit configuration, which comprises:

• producing at least two capacitor elements in at least one zone of a first substrate adjoining a surface of the first substrate, and spacing the capacitor elements apart by a given distance;
• producing at least one contact on a second substrate, in a region of a surface of the second substrate, and setting at least one dimension of a cross section of a contact surface of the at least one contact parallel to the surface of the first substrate to be larger than the given distance;
• joining the first substrate and the second substrate in an essentially unadjusted manner, with the contact surface adjoining at least two of the capacitor elements;
• and
• forming a capacitor of at least two of the capacitor elements adjoining the contact surface.