Evaluation of semiconductor chargeup damage and apparatus therefor
AssigneeMatsushita Electronics Corporation
InventorMasaharu Yamamoto
Life of this patent
Estimating the term…
Abstract
To provide a method for evaluating chargeup damage caused in the practical fabrication process. Evaluation is carried out based on the electric current flowing between the source and the drain of a MOS transistor of a semiconductor element (1—1) having a wiring layer provided with an antenna effect by installing the semiconductor element (1—1) in the periphery of a practical device installed in a semiconductor substrate and measuring the electric current without attaching a probe to the gate of the semiconductor element (1—1).
Claims16
A semiconductor device comprising elements for evaluation comparison installed in the periphery of a practical device formed in a semiconductor substrate and necessary to be evaluated, wherein the elements are a first semiconductor element comprising a wiring layer having an antenna effect and a second semiconductor element comprising a gate having no wiring layer having said antenna effect but equipped with an electrode.
Dependencies are inferred from the claim text.