Method for forming a via and interconnect in dual damascene
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChine-Gie Lou
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChine-Gie Lou
Estimating the term…
A first low-k layer is formed over a structure having an exposed active device. A patterned first nitride layer having an opening therethrough aligned over a portion of the active device is formed. Nitride spacers are formed over the side walls of the opening. A second low-k layer is formed over the patterned first nitride layer, filling the patterned first nitride layer opening. The second low-k layer and the first low-k layer through the opening reduced by the nitride spacers are patterned to expose a portion of the active device to form a preliminary dual damascene. The nitride spacers and the first nitride layer exposed by the preliminary dual damascene opening are removed to form a final upper horizontal interconnect opening having substantially 90° edges. The first and second low-k layers are then reflowed to round the substantially 90° edges of the first and second low-k layer.
A method of forming a dual damascene opening, comprising the steps of:
A method of forming a dual damascene opening, comprising the steps of:
A method of forming a dual damascene opening, comprising the steps of:
A method of forming a dual damascene opening, comprising the steps of:
A method of forming a dual damascene opening, comprising the steps of:
Dependencies are inferred from the claim text.