Method of fabricating vias

A method of fabricating an interconnect, comprising:

• providing a semiconductor substrate having a conducting area;
• forming a dielectric layer on the semiconductor substrate, the dielectric layer having a via opening exposing the conducting area;
• forming a conformal wetting layer comprising titanium on the via opening;
• forming an Al—Si—Cu alloy layer on the conformal wetting layer by a sputtering process at a temperature in a range from about 0° C. to about 200° C., the Al—Si—Cu alloy layer containing about 0.5 weight % to about 1 weight % of silicon and about 0.4 weight % to about 0.6 weight % of copper, and the Al—Si—Cu alloy layer being formed without any significant generation of AlTi3 byproducts;
• and
• forming an Al—Cu alloy layer on and adjacent to the Al—Si—Cu alloy layer to fill the via opening by a sputtering process at a temperature in a range from about 380° C. to about 450° C., the Al—Cu alloy layer containing about 0.4 weight % to about 0.6 weight % of copper, wherein the aluminum in the Al—Cu alloy layer does not react with titanium in the wetting layer to form AlTi3 byproducts.