Alignment mark fabrication process to limit accumulation of errors in level to level overlay

A process for device fabrication, comprising:

• coating a wafer with a layer including SiO2, SiNx, and a first resist;
• defining shallow trench isolation and alignment patterns in the first resist;
• transferring the first resist pattern into the SiO2 and SiNx;
• removing the first resist;
• etching trenches to a depth suitable for shallow trench isolation;
• coating the wafer with a second photoresist;
• defining open areas around alignment marks;
• etching alignment mark trenches to a depth greater than the trench depth, suitable for alignment mark detection;
• removing the second resist and the SiNx;
• depositing SiO2 to fill the trenches for shallow trench isolation and fill the alignment mark trenches for alignment mark detection;
• performing chemical mechanical polishing, leaving shallow trench isolation features and SiO2/Si alignment marks.

A process for device fabrication, comprising:

• coating a wafer with a multi-layer;
• defining shallow trench isolation and alignment patterns in the multi-layer;
• etching trenches in the multi-layer and the wafer to a depth suitable for shallow trench isolation;
• coating the wafer with a second layer;
• etching alignment mark trenches in the second layer and the wafer to a depth greater than the trench depth, suitable for alignment mark detection;
• depositing material to fill the trenches for shallow trench isolation and partially fill the alignment mark trenches for alignment mark detection;
• and
• performing chemical mechanical polishing, leaving shallow trench isolation features and topographical alignment marks.

A process for device fabrication, comprising:

• coating a wafer with a multi-layer;
• defining shallow trench isolation and alignment patterns in the multi-layer;
• etching trenches in the multi-layer and the wafer to a depth suitable for shallow trench isolation;
• coating the wafer with a second layer;
• etching alignment mark trenches in the second layer and the wafer to a depth greater than the trench depth, suitable for alignment mark detection;
• depositing material to fill the trenches for shallow trench isolation and fill the alignment mark trenches for alignment mark detection;
• and
• performing chemical mechanical polishing, leaving shallow trench isolation features and SiO2/Si alignment marks.