Method of forming a mixed-signal circuit embedded NROM memory and MROM memory

A method of forming a system on chip (SOC), the method comprising:

• providing a semiconductor substrate, the surface of the semiconductor substrate divided into a memory area, a low voltage device area, a high voltage device area and a mixed-signal circuit area;
• performing a shallow trench isolation process to form a plurality of shallow trench isolation areas for isolating devices;
• forming a bottom electrode of a capacitor atop the shallow trench isolation area in the mixed-signal circuit area;
• forming an ONO dielectric layer on the surface of the semiconductor substrate, the ONO dielectric layer covering a bottom electrode of the capacitor;
• forming a plurality of buried bit lines in the semiconductor substrate in the memory area;
• simultaneously forming an oxide layer atop each buried bit line and a gate oxide layer on the surface of the semiconductor substrate in the low voltage device area;
• depositing a polysilicon (PL1) layer on the surface of the semiconductor substrate;
• performing a photolithography and etching process to form a plurality of bit lines in the memory area, a gate for a low voltage MOS transistor in the low voltage device area, a gate for a high voltage MOS transistor in the high voltage device area, a top electrode of the capacitor, and a resistor in the mixed-signal circuit area;
• and
• performing a ROM code implantation process to a portiona portion of the memory devices in the memory area so as to form a read only memory (ROM) area.