US 6,440,792 B1Granted

DRAM technology of storage node formation and no conduction/isolation process of bottle-shaped deep trench

AssigneesProMOS Technology, Inc., Mosel Vitelic, Inc., Siemens Aktiengesellschaft

InventorsJia S. Shiao, Wen B. Yen

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Abstract

An improved method for reducing the cost of fabricating bottle-shaped deep trench capacitors. It includes the steps of: (a) forming a deep trench into a semiconductive substrate; (b) filling the deep trench with a first dielectric material to a first predetermined depth; (c) forming a silicon nitride sidewall spacer in the deep trench above the dielectric layer; (d) removing the first dielectric layer, leaving the portion of the substrate below the sidewall spacer to be exposed; (e) using the sidewall spacer as a mask, causing the exposed portion of the substrate to be oxidized, then removing the oxidized substrate; (f) forming an arsenic-ion-doped conformal layer around the side walls of the deep trench, including the sidewall spacer; (g) heating the substrate to cause the arsenic ions to diffuse into the substrate in the deep trench not covered by the sidewall spacer; (h) removing the entire arsenic-ion-doped layer; (i) forming a conformal second dielectric layer covering the surface of the deep trench including the sidewall spacer, then filling the deep trench with a first conductive material to a second predetermined depth which is above the first predetermined depth; (j)removing the sidewall spacer and the second dielectric layer above the second predetermined depth; and (k) filling the deep trench with a second conductive material. The present invention allows several cycles of deposition/controlled etching to be eliminated while improving the quality of the deep trench capacitors.

Claims9

Dependent claims

A method for fabricating bottle-shaped deep trench capacitors comprising the steps of:

(a) using a photolithography process to form a deep trench into a semiconductive substrate;
(b) partially filling said deep trench with a first dielectric material to form a first dielectric layer having a first predetermined depth;
(c) forming a sidewall spacer in said deep trench above said dielectric layer, said sidewall spacer being made from a second dielectric material having a different etchability from said first dielectric material and allowing low diffusion rate for ions;
(d) removing said first dielectric layer, leaving said portion of said substrate below said sidewall spacer to be exposed;
(e) using said sidewall spacer as a mask, causing said exposed portion of said substrate in said deep trench to be oxidized, then removing said oxidized substrate;
(f) forming an ion-doped conformal layer around sidewalls of said deep trench, including said sidewall spacer;
(g) heating said substrate to cause said doping ions to diffuse into said substrate to form a diffused region in said deep trench not covered by said sidewall spacer, wherein said diffused region becomes said first conductive plate;
(h) removing the entire ion-doped layer;
(i) forming a conformal second dielectric layer covering a surface of said deep trench including said sidewall spacer, then filling said deep trench with a first conductive material to a second predetermined depth which is above said first predetermined depth;
(j) removing said sidewall spacer and said second dielectric layer above said second predetermined depth;
and
(k) filling said deep trench with a second conductive material, wherein said first and second conductive materials collectively form a second conductive plate.

9 more elements

Dependencies are inferred from the claim text.