Method of measuring combined critical dimension and overlay in single step

A method for determining the overlay and critical dimension of a semiconductor structure in a single pass from a scanning electron microscope without use of an overlay tool, comprising:

• a) providing a semiconductor wafer structure in an overlay pattern, said semiconductor wafer structure in an overlay pattern comprising:
• I) a center feature section that provides a critical dimension point along a given axis;
• II) a plurality of smaller sections positioned adjacent to said center feature section along said given axis that include a plurality of spaces between each of the plurality of smaller sections;
• and
• III) a plurality of displacement lines adjacent to a plurality of said smaller sections to displace a plurality of spaces;
• b) collecting a first measurement along said plurality of smaller sections positioned adjacent to said center feature section, said plurality of spaces and said plurality of displacement lines, with a scanning electron microscope;
• c) collecting a second measurement along a center feature section that provides a critical dimension point along said given axis with said scanning electron microscope;
• d) establishing a relationship between said first measurement and said second measurement of said semiconductor wafer structure;
• and
• e) mapping a two dimensional waveform output corresponding to overlay and critical dimensional characteristics from an output of the scanning electron microscope to provide information on the overlay and critical dimension of the semiconductor wafer structure from said given axis;
• wherein steps b) and c) are performed in a single pass with said scanning electron microscope.