Overvoltage protection device including wafer of varistor material

An overvoltage protection device for use with a varistor wafer of the type having first and second opposed, substantially planar wafer surfaces, said device comprising:

• a) a housing including a first substantially planar electrical contact surface and an electrically conductive sidewall, said housing defining a cavity therein and having an opening in communication with said cavity;
• and
• b) an electrode member including a second substantially planar electrical contact surface facing said first contact surface and disposed within said cavity, a portion of said electrode extending out of said cavity and through said opening;
• c) wherein said housing and said electrode member are relatively arranged and configured to receive the wafer within said cavity such that the wafer is positioned between said first and second electrical contact surfaces with said first and second electrical contact surfaces engaging the first and second wafer surfaces, respectively.

An overvoltage protection device for use with a varistor wafer of the type having first and second opposed, substantially planar wafer surfaces, said device comprising:

• a) a housing defining a cavity therein and having an opening in communication with said cavity, said housing including:
• a sidewall;
• and
• a bottom wall including a first substantially planar electrical contact surface and an adjacent recessed surface, said first electrical contact surface defining a raised platform relative to said recessed surface;
• and
• b) an electrode member including a second substantially planar electrical contact surface facing said first contact surface and disposed within said cavity, a portion of said electrode extending out of said cavity and through said opening;
• c) wherein said housing and said electrode member are relatively arranged and configured to receive the wafer within said cavity such that the wafer is positioned between said first and second electrical contact surfaces with said first and second electrical contact surfaces engaging the first and second wafer surfaces, respectively, and such that the wafer does not engage said recessed surface.

An overvoltage protection device for use with a varistor wafer of the type having first and second opposed, substantially planar wafer surfaces, said device comprising:

• a) a housing including a first substantially planar electrical contact surface and a sidewall, said housing defining a cavity therein and having an opening in communication with said cavity;
• b) an electrode member including:
• a second substantially planar electrical contact surface facing said first contact surface and disposed within said cavity;
• and
• a shaft extending out of said cavity and through said opening, said shaft including a circumferential shaft groove formed therein;
• c) a closure member interposed between said second electrical contact surface and said opening, said closure member having a hole defined therein;
• and
• d) a resilient O-ring disposed in said shaft groove;
• e) wherein said shaft extends through said aperture, said O-ring is disposed in said hole and said O-ring is positioned to provide a seal between said shaft and said closure member;
• f) wherein said housing and said electrode member are relatively arranged and configured to receive the wafer within said cavity such that the wafer is positioned between said first and second electrical contact surfaces with said first and second electrical contact surfaces engaging the first and second wafer surfaces, respectively.

An overvoltage protection device for use with a varistor wafer of the type having first and second opposed, substantially planar wafer surfaces, said device comprising:

• a) a housing including a first substantially planar electrical contact surface and a sidewall, said housing defining a cavity therein and having an opening in communication with said cavity;
• b) an electrode member including a second substantially planar electrical contact surface facing said first contact surface and disposed within said cavity, a portion of said electrode extending out of said cavity and through said opening;
• c) a closure member interposed between said second electrical contact surface and said opening, said closure member having a peripheral groove formed therein;
• and
• d) a resilient O-ring disposed in said peripheral groove;
• e) wherein said O-ring is positioned to provide a seal between said closure member and said sidewall of said housing;
• f) wherein said housing and said electrode member are relatively arranged and configured to receive the wafer within said cavity such that the wafer is positioned between said first and second electrical contact surfaces with said first and second electrical contact surfaces engaging the first and second wafer surfaces, respectively.

An overvoltage protection device for use with a varistor wafer of the type having first and second opposed, substantially planar wafer surfaces, said device comprising:

• a) housing including a first substantially planar electrical contact surface and a sidewall, said housing defining a cavity therein and having an opening in communication with said cavity;
• b) an electrode member including a second substantially planar electrical contact surface facing said first contact surface and disposed within said cavity, a portion of said electrode extending out of said cavity and through said opening;
• c) an end cap positioned in said opening;
• and
• d) a clip positioned to limit displacement between said end cap and said housing;
• e) wherein said housing and said electrode member are relatively arranged and configured to receive the wafer within said cavity such that the wafer is positioned between said first and second electrical contact surfaces with said first and second electrical contact surfaces engaging the first and second wafer surfaces, respectively.

An overvoltage protection device for use with a varistor wafer of the type having first and second opposed, substantially planar wafer surfaces, said device comprising:

• a) a housing including a first substantially planar electrical contact surface and a sidewall, said housing defining a cavity therein and having an opening in communication with said cavity;
• b) an electrode member including a second substantially planar electrical contact surface facing said first contact surface and disposed within said cavity, a portion of said electrode extending out of said cavity and through said opening;
• and
• c) first and second Belleville washers biasing at least one of said first and second contact surfaces toward the other, each of said washers being tapered along an axis thereof;
• d) wherein said first and second Belleville washers are axially aligned and oppositely oriented;
• e) wherein said housing and said electrode member are relatively arranged and configured to receive the wafer within said cavity such that the wafer is positioned between said first and second electrical contact surfaces with said first and second electrical contact surfaces engaging the first and second wafer surfaces, respectively.