Embedded mechanism offering real-time self failure detection for an analog to digital converter

A method of operating an analog-to-digital converter (ADC) to provide self failure detection comprising:

• generating a first sample period in which a sample and hold circuit in said ADC receives a signal applied to an Input terminal of said ADC;
• applying, during said first sample period, an input signal to said input terminal, said input signal having a predetermined amplitude range;
• applying, during said first sample period, a reference signal having an amplitude higher than or lower than said predetermined amplitude range, to said input terminal;
• generating a second sample period in which said sample and hold circuit receives and holds a signal applied to said input terminal;
• applying, during said second sample period, only said input signal to said input terminal,
• generating a conversion period during which a value held in said sample and hold circuit is converted into a digital value;
• determining if said digital value corresponds to said amplitude of said reference signal or is shifted towards said amplitude of said reference signal;
• and
• detecting a failure on determining said correspondence or shifting.

An analog to digital converter (ADC) having self-test capabilities comprising:

• an input terminal for being coupled to an input signal having a predetermined amplitude range;
• a sample and hold circuit coupled to said input terminal;
• a converter coupled to said sample and hold circuit;
• a control circuit coupled to said sample and hold circuit and to said converter for generating a control signal to provide first and second sample periods and a conversion period;
• a switch coupled to said input terminal and responsive to said control signal for applying a reference signal to said input terminal during said first sample period and not during said second sample period, said reference signal being outside of said predetermined amplitude range;
• and
• a comparator coupled to an output of said ADC for determining a failure if a digital value generated by said ADC which corresponds to said amplitude of said input signal is outside a range of values which correspond to said predetermined amplitude range.

A system for analog-to-digital conversion (ADC system) comprising:

• a self-test controller;
• a real-time failure detection circuit controlled by said self-test controller for detecting failures in said ADC system, said failure detection circuit generating at least a first reference signal which is outside a range of values expected as an input signal;
• an analog-to-digital converter (ADC) for sampling said input signal and converting said sample to a digital value;
• wherein said failure detection circuit applies said reference signal and said input signal to said ADC during a first sample period and only said input signal during a second sample period, and compares a converted output against an expected output range whereby a failure of said ADC system is determined if said converted output is outside said expected output range.

An engine control system comprising:

• a sensor for sensing a state of operation of an engine and generating a monitor signal;
• an analog-to-digital converter (ADC) for sampling said monitor signal and converting said sample to a digital value;
• a self-test controller;
• a real-time failure detection circuit controlled by said self-test controller for detecting failures in said system, said failure detection circuit generating at least a first reference signal which is outside a range of values expected of said monitor signal,
• wherein said failure detection circuit applies said reference signal and said input signal to said ADC during a first sample period and only said input signal during a second sample period, and compares a converted output against an expected output range whereby a failure of said system is determined if said converted output is outside said expected output range.