Self-aligned double gate silicon-on-insulator (SOI) device

Abstract

A self-aligned double gate transistor, comprising: a first silicon portion on an isolation layer, the silicon portion having formed therein a source region and a drain region separated by a channel region, and having a first side and a second side, the first side and the second side having a first gate oxide and a second gate oxide, respectively, formed thereon; a first silicon gate abutting said first side of said channel region on said insulator; and a second silicon gate abutting said second side of said channel on said insulator. A method for manufacturing a double gate transistor device, comprising: providing a substrate having a buried oxide region; depositing a first nitride mask layer having a pattern overlying a silicon region; forming a trench in said substrate with a depth to said buried oxide; forming a gate oxide in said trench; depositing polysilicon in said trench; depositing a second nitride mask layer having a pattern formed perpendicular to said first nitride mask; etching the portion of said polysilicon not underlying said first or second nitride layers; removing said second nitride layer; and implanting an impurity into exposed portions of polysilicon in said trench and of said silicon-on-insulator substrate underlying said second nitride layer.

Dependencies are inferred from the claim text.